• State Answer Suggested
  • Locked Locked
  • Replies 2 replies
  • Answers 2 answers
  • Subscribers 80 subscribers
  • Views 848 views
  • Users 0 members are here
Support feedback
Options
Options
Related

This thread has been locked.

If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.

MSP-FET: TCLK frequency

Kaka
Guru 24520 points

Other Parts Discussed in Thread: MSP-FET, MSP430FR5959, MSP430F1612

Hi community member,

Please let me confirm the following question.

[Question]

Would you please provide the data of TCLK frequency of MSP-FET for MSP430FR5xx or FR6xx family?

My customer would like to know this information in order to calculate the flashing time.

 Regarding to your MSP-FET product page, Up to 4x faster read/write speeds than the previous FET programmer version, MSP-FET430UIF.  Thus, I think that the TCLK of MSP-FET will be more faster than MSP-FET430UIF.

 Also regarding to your documents(slau320.pdf), it shows that "TCLK signal  at a frequency of 350kHz +- 100kHz " for 1xx, 2xx, 4xx family".　

If you have any question, please let me know.

Best regards.

Kaka

Up to 4x faster read/write speeds than the previous FET programmer version, MSP-FET430UIF

  • 0
    Guru 34973 points

    Yes, in general, for FRAM, higher clock on JTAG / SBW lines will give higher writing rate. But writing rate is also depending on used algorithm. For example you can put MSP-FET FRAM JTAG writing 50 KB/s (I gues at max 8 MHz clock at JTAG lines) against my flasher with 58 KB/s using standard SBW at max 4 MHz clock on SBW lines.

    D:\msp430>flash -p com15 -f test_msp430fr5959.txt -wq

    File: "test_msp430fr5959.txt"
    Address: 04400  Words: 32256
    Size: 64512 bytes

    Get Device
    # JTID Fuse Device Core Hard Soft LotWafer DieX DieY
    2  99   OK   6581  1106  30   30  E1271D07 2F00 1900
    3  99   OK   6181  1106  30   30  C1F22407 2B00 2200

    Write Quick
    Time: 1089 ms  Speed: 57,8 KB/s

    Release Device

    Total Time: 1266 ms

    D:\msp430>

    Flashing frequency for 1xx, 2xx an 4xx family (350 kHz +- 100 kHz) is specified by target device master clock and divider, and higher clock on JTAG / SBW can increase, but also decrease flashing rate. Flashing can go up to 50 KB/s (475 kHz).

  • 0
    Guru 227245 points

    The original FET did run on an MSP430F1612. Nominal maximum frequency: 8MHz core, but the selected parts were overclocked with 10MHz or so.
    However, this limits the maximum signal toggle frequency to a fraction of it. 350kHt +.100kHz seems reasonable, depending of what has to be done too between two clock edges.
    The new MSP-FET uses a 5x family MSP, which allows up to 25MHz clock speed. Also, the data transfer between PC and FET directly uses USB. So when the USB packet is received by the FET, its content can be directly used. On the FET430UIF, the received USB packet was then sent sequentially to the MSP through serial connection (so max. 50k/s data exchange throughput, not simultaneously to the JTAG throughput). Adding a serious latency to any instruction sent by the PC.

    On devices with flash memory, writing speed is further limited by the flash writing speed. This is not the case for FRAM devices, as here the FRAM can be written in one clock cycle, provided that the clock frequency is below 8MHz.

**Attention** This is a public forum