MSP430 Timers: Synchronization and Interrupt Instruction Processing.

Michael Choi said:

My question is, is it possible to configure a timer to use 2 separate clocks

Timer can use only single clock at a time. Perhaps you want to know - is it possible to run CPU from one clock while timer fro anoter? - Yes.

You shall read User' s Manual, Timer chapter, clock source where you can see:

The timer clock can be sourced from ACLK, SMCLK, or externally via TACLK or INCLK. The clock source
is selected with the TASSELx bits

ACLK can be slow clock running from 32KHz watch crystal or external clock while CPU clock source could be 16MHz DCO.

Dear llmars;

     Thank you for your reply.

     I believe that you misunderstood  the question that I had raised.     You only interpreted one sentence and quoted one sentence without considering how the entire question was "framed" in your answer.   If you re-read the question again, you will see that your focus with regard to the question was too narrow.   

     The gist of the question concerns "instruction processing time."

      I am under the belief that the instructions contained within the ISR can be processed at a different rate than the timer clock source.

      However, I do require verification because I do not make "assumptions" about timing.   I can experimentally measure the time that instructions are processed within the ISR.  Yet, if I were to teach a class, I would like to be certain that my statements are correct and verified.  Posing this question at this forum simplifies this task and provides me with a measure of confidence.

     I am only seeking verification from a TI engineer who will assert that the processing of the instructions contained in the interrupt service routine can be processed at a different clock rate  other than the clock rate that is sourcing the timer.    Hopefully, a TI engineer will answer this question. 

Michael Choi said:

I am only seeking verification from a TI engineer who will assert that the processing of the instructions contained in the interrupt service routine can be processed at a different clock rate  other than the clock rate that is sourcing the timer.

You don't need TI engineer but User' s Guide :)

Michael Choi said:

If you re-read the question again

If you re-read my answer again you will notice that I already answered your question.

Answer is: YES!

Ilmars said:

is it possible to run CPU from one clock while timer fro anoter? - Yes.

The timer clock can be sourced from ACLK, SMCLK, or externally via TACLK or INCLK. The clock source
is selected with the TASSELx bits

ACLK can be slow clock running from 32KHz watch crystal or external clock while CPU clock source could be 16MHz DCO.

For all interested readers:

     I absolutely, positively, never wrote:

"is it possible to run CPU from one clock while timer fro anoter?"

     Nowhere in my original post does this statement exist.   Therefore, all of the following references with regard to this statement are not relevant.  (Note:   I read the manual, let me restate that I was looking for an explicit reply to my question and I did not rely upon inferences.)

     I wrote this post because I was in the initial design stage of a program and I was looking for a quick, explicit, answer.    Which I did not receive. 

      The answer to my question was experimentally verified by me.   For the benefit of all interested readers/programmers, who do not own a high end, multichannel, oscilloscope, it was verified by experiment, that the instructions running within the ISR can be processed at the time which corresponds to the setting of the CPU master clock rate which ran at a different clock rate (faster clock rate) than the clock that was "sourcing" the timer. 

A timer by itself is a simple counter. It counts its clock pulses. Nothing more. You tell the MSP timer which clock to count. ACLK, SMCLK or an external clock signal. Frequency and duty cycle of the clock are (mostly) at will.
In addition to the counter, the timer has several capture/compare registers. They can work in capture or compare mode. In capture mode, they will capture the current timer count when an external trigger is detected. If this happens, an interrupt is triggered, and the timer count in the moment of the event is stored in the CC register (e.g. TA0CCR1). In compare mode, the CC register is loaded with a value, and when the current timer count reaches this value, an interrupt is triggered. Also, an output signal action can be optionally performed at this very moment (independently of the execution of any ISR code). This mode is often used for generating a PWM signal (without any software effort). But it can also be used to precisely time the edges of an arbitrary output signal pattern. A software UART can use this feature to time the bit changes.

It usually makes no sense clocking the timer with a slow external clock, since any operation, capture or compare, would be synchronized to this external clock. It would make sense if you e.g. want to trigger an interrupt on the nth external clock pulse. Or if the external clock isn’t really a clock but rather an occasional event signal and you want an interrupt on the nth event.

In any case, the execution speed of the code is independent of the clock the timer uses. Moreover, if the CPU clock and the timer clock are independent, reading the timer count may result in a wrong reading once in a while. So three readings and a majority vote are recommended if the timer clock is much slower than MCLK. Also, interrupt execution depends on the system state. There is a certain latency, and if at the moment of an interrupt another interrupt is just being served, this latency significantly increases. For bit-banging output using a timer, you should take a look at the software UART example for the G2 LaunchPad.
You should still check whether you can’t (ab)use the SPI hardware for your purpose. After all, you can load any pattern into the shift register, so it gets sent on any external clock pulse. Some people have used the USI SPI function to send an UART data stream (USI does not have an UART mode).

btw: yes, ylu never used the exact words "is it possible to run CPU from one clock while timer fro anoter?" but you said

Michael Choi said:

Let's say, I configure the timer clock to be sourced from an external low frequency source (eg.: crystal in KHz range), however, the master clock is configured to be running at the maximum 16 MHz,

Jens-Michael Gross said:

btw: yes, ylu never used the exact words "is it possible to run CPU from one clock while timer fro anoter?" but you said

Let's say, I configure the timer clock to be sourced from an external low frequency source (eg.: crystal in KHz range), however, the master clock is configured to be running at the maximum 16 MHz,

 
Which cna only be interpreted as the same, even if you didn't mean it this way.[/quote]

In the light of Michael's last post I re-read the original post, and I think it's the following part that is of key importance (my emphasis):

Michael Choi said:

Let's say, I configure the timer clock to be sourced from an external low frequency source (eg.: crystal in KHz range), however, the master clock is configured to be running at the maximum 16 MHz, can you tell me, is it the norm for the instructions contained in the interrupt to be processed using the 16 MHz clock source?   

Since it's widely taken for granted that the CPU always processes instructions in an ISR at MCLK frequency, I think a lot of readers (including myself) would have disregarded that aspect of the question. That put the focus onto answering the question "is it possible to configure a timer to use 2 separate clocks.", which wasn't really at the core of what Michael wanted to find out.

Jens-Michael Gross said:

It usually makes no sense clocking the timer with a slow external clock

Running timer from (slow) 32KHz ACLK (LFXTxCLK) with compare ISR to implement software RTC makes lot of sense to me. Do I use fast DCO or slow LFXTxCLK for timer ISR - depends on application.

Michael Choi said:

The task - is a synchronous, GPIO, "bit banging" function: 

      I want to configure a timer so that the signal pulses (clock and data signals) are very low in frequency (therefore, the timer is sourced from a low frequency clock). ...

Here is a red herring, is 30.52.Hz very low in frequency?

If so, then the timer can be sourced from 16000000 Hz clock. (Note that 16000000 / 8 / 65536 = 30.52 Hz). There is no need for the timer to be sourced from a low frequency clock, and the red herring becomes quite relevant!

Dear Old_Cow_Yellow;

      Thank  you for your informative reply.  

       You make a very good point.   My programming ideas were in the initial development stages.   My program is still in the development stages.  

       After giving some thought to my hardware platform, I am abandoning  using the MSP430g Launchpad kit for this project.    If there was reliable gpio "bit banging" code using the Launchpad, I would think that I would have found it somewhere, or a TI engineer would have pointed it out to me.   Or, at least, he/she would have told me the pitfalls of using the Launchpad for this task.   

      I am changing hardware platforms.  I am going to use the USB MSP430F5529 kit for this endeavor.   Therefore, there is a steep learning curve I must climb first.  Hopefully, someone can fast track me to some reliable code.   A climbing I will go!

      Anyway, thank you for your reply.   It was appreciated.

MSP430G2553 etc. are quite capable of doing "bit banging". The limitations are:

(1) The frequency of the banging must be slow. Probably <100 kHz.

(2) The number of bits must be small. Probably <4 pins.

-------

Nowadays, everyone searches the Internet for everything. If Internet was invented before the wheel was invented, nobody could invent the wheel -- because it was not already on the Internet;)

There is no literature or internet source that I have found that even mentions "bit banging" and using a counter to do it. 

Although the idea appears to be a natural application.  Nowhere is the idea mentioned in the user's guide to my knowledge.  

I would really like to say that I was the first to think of it because it is not mentioned in TI literature that I have read, nor have I found any references on the internet but I know somebody had to have the idea before I did.   

It is a little strange that really useful stuff is nowhere to be found.    It is a peculiar oddity.

Oh, well, I have to hit the books.  I have a learning curve to climb.

There are too many ways to do "bit banging" with the Timer of MSP430. Despite of that, here is an example I wrote last night. I am currently overseas and do not have access to any MSP430 or the tools. I have no way to verify if it works.

I intend to use ACLK to drive Timer1 at a very low frequency. As I commented earlier, this is usually unnecessary but there is nothing wrong either. I "bang" three "bits" in time intervals of every 100 ACLKs. 

I intend to "bang" one of the three bits so that it is a 1 for one period of 100 ACLKs out of every two such periods.

I "bang" the second bit so that it is a 1 for one period out of every three periods.

I "bang" the third bit so that it is a 1 for one period out of every five periods.

#include "msp430G2553.h"

// An example of "bit banging" with MSP430G2553

volatile int q0, q1, q2;

void main( void )
{
  WDTCTL = WDTPW + WDTHOLD;

  // Set up P1.0 and P1.4 to show ACLK and SMCLK respectively
  P1DIR |= BIT0 | BIT4;
  P1SEL |= BIT0 | BIT4;

  // Set up DCOCLK to 16MHz +/- 2%
  // provided that INFO-A has the factory "calibration constants"
  DCOCTL = 0;
  BCSCTL1 = CALBC1_16MHZ;
  DCOCTL = CALDCO_16MHZ;

  // Set up MCLK = DCOCLK/1 (~16 MHz), SMCLK = DCOCLL/8 (~2 MHz)
  BCSCTL2 = DIVS_3;

  // Set up LFXT1 to something between 4 kHz and 20 kHz
  // this frequency is Vcc, operating temperature and chip dependent
  BCSCTL3 = LFXT1S_2;
  BCSCTL1 &= ~XTS;

  // We could have set up ACLK to 1/2, 1/4, or 1/8 of LFXT1
  // but we leave ACLK to be LFXT1/1 (4 to 20 kHz)
  BCSCTL1 |= DIVA_0; // this instructions is actually not needed

  // Set up pin 8 (P2.0), pin 10 (P2.2), and pin 10 (P2.4) as Timer1 output pins
  P2DIR |= BIT0 | BIT2 | BIT4;
  P2SEL |= BIT0 | BIT2 | BIT4;

  // Set up Timer1 to "bang" those "bits"
  // the "banging" is actually carried out in ISR
  TA1CCR0 = 100;
  TA1CCR1 = 100;
  TA1CCR2 = 100;
  TA1CCTL0 = OUTMOD_1 | CCIE;
  TA1CCTL1 = OUTMOD_1;
  TA1CCTL2 = OUTMOD_1;
  TA1CTL = TASSEL_1 | MC_2;

  // Turn off the CPU and enable interrupt
  // this makes debugging very difficult
  __bis_SR_register(CPUOFF | GIE);
  while (1); // this nonsense helps a little, but not much
}

// ISR to set pin 8 once every 2 interrupts, pin 10 once every 3 interrupts,
// and pin 12 once every 5 interrupts
#pragma vector = TIMER1_A0_VECTOR
__interrupt void T1A0_isr (void)
{
  if (q0--)
    TA1CCTL0 &= ~OUTMOD2;
  else
  {
    q0 = 2-1;
    TA1CCTL0 |= OUTMOD2;
  }
  TA1CCR0 += 100;
  if (q1--)
    TA1CCTL1 &= ~OUTMOD2;
  else
  {
    q1 = 3-1;
    TA1CCTL1 |= OUTMOD2;
  }
  TA1CCR1 += 100;
  if (q2--)
    TA1CCTL2 &= ~OUTMOD2;
  else
  {
    q2 = 5-1;
    TA1CCTL2 |= OUTMOD2;
  }
  TA1CCR2 += 100;
}

Michael Choi said:

There is no literature or internet source that I have found that even mentions "bit banging" and using a counter to do it. 

Maybe you used wrong keywords? After all "bit banging" sounds quite rude..

You shall check "software UART" example msp430g2xx3_ta_uart2400.c which is exactly what you are looking for:

http://www.ti.com/lit/zip/slac485

Note that those examples are compatible with msp430g2553 of LaunchPad.

Robert: yes, now that you point it out, indeed, the real question is the last part of the sentence and the first part obfuscates it.

Dear Old_Cow_Yellow and Mr. Gross;

      Thank you for your replies.

       Old_Cow_Yellow,  I would like to thank you for writing the program.   My apologies for not replying sooner. 

I have abandoned using the MSP430g Launchpad entirely for this project.  The hardware available on this kit is not as good as the TI MSP430f5529 USB kit.    Since you answered my question about the timer interrupt vector register you can probably guess that I am still pursuing this project.  

       I like using the MSP430f USB kit - Timer B hardware appears to be better suited for this task.  I am still working on this project.   However, I don't believe it will be completed any time soon.   I program the MSP430F when I have some free time - as of late I have been busy doing some other things and I can't devote as much time as I would like to this project.  

       I looked at your program.  I liked its "form".    Your reply was appreciated.   If I use its "form" in my program, I will tell you how it worked out.

      Thanks again for your informative replies.

     Sincerest Regards,