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Sigma- delta ADC

HI,

These are  Register settings for Sigma - delta ADC 

-Clock =  SMCLK

Clock division  = divided by 2

reference  = internal shared reference

Preload register = 0

OSR = 256-1

Seven converters are grouped in "Group 0"

In code, They are current samples in 3 stages and voltage samples in only stage, i want to know why they have taken current samples 3 stages. this is my code.

void adc_interrupt(void)
#endif
{

P1OUT |= BIT4; //MCLK

RelayPulse(); //Count Relay Pulse

//STOP ADC
/* If nmi comes then return*/
if (UC_PowerFailFlag==1)
/* CBOUT will be LOW if Main power is there :When the comparator is switched off, CBOUT is always low*/
//if((CBCTL1 & CBOUT) == CBOUT) //But battery mode also it will return from here
{
return;
}

#if defined(__HAS_SD_ADC__)
if (!ADC_VOLTAGE_PENDING(PHASE_1_VOLTAGE_ADC_CHANNEL))
{
/* We do not have a complete set of samples yet, but we may need to pick
up some current values at this time */
if (ADC_CURRENT_PENDING(PHASE_1_CURRENT_ADC_CHANNEL))
{
adc_i_buffer[0] = ADC_CURRENT(PHASE_1_CURRENT_ADC_CHANNEL);
ADC_CURRENT_CLEAR(PHASE_1_CURRENT_ADC_CHANNEL);
}
#if NUM_PHASES >= 2
if (ADC_CURRENT_PENDING(PHASE_2_CURRENT_ADC_CHANNEL))
{
adc_i_buffer[1] = ADC_CURRENT(PHASE_2_CURRENT_ADC_CHANNEL);
ADC_CURRENT_CLEAR(PHASE_2_CURRENT_ADC_CHANNEL);
}
#endif
#if NUM_PHASES >= 3
if (ADC_CURRENT_PENDING(PHASE_3_CURRENT_ADC_CHANNEL))
{
adc_i_buffer[2] = ADC_CURRENT(PHASE_3_CURRENT_ADC_CHANNEL);
ADC_CURRENT_CLEAR(PHASE_3_CURRENT_ADC_CHANNEL);
}
#endif

#if defined(NEUTRAL_MONITOR_SUPPORT)
if (ADC_CURRENT_PENDING(NEUTRAL_CURRENT_ADC_CHANNEL))
{
adc_i_buffer[NUM_PHASES] = ADC_CURRENT(NEUTRAL_CURRENT_ADC_CHANNEL);
ADC_CURRENT_CLEAR(NEUTRAL_CURRENT_ADC_CHANNEL);
}
#endif
return;
}
/* Voltage is available on all phases (guaranteed, as the voltage ADCs always run in sync). */
adc_v_buffer[0] = ADC_VOLTAGE(PHASE_1_VOLTAGE_ADC_CHANNEL);
ADC_VOLTAGE_CLEAR(PHASE_1_VOLTAGE_ADC_CHANNEL);
#if !defined(VOLTAGE_SIGNAL_IS_COMMON)
#if NUM_PHASES >= 2
adc_v_buffer[1] = ADC_VOLTAGE(PHASE_2_VOLTAGE_ADC_CHANNEL);
ADC_VOLTAGE_CLEAR(PHASE_2_VOLTAGE_ADC_CHANNEL);
#endif
#if NUM_PHASES >= 3
adc_v_buffer[2] = ADC_VOLTAGE(PHASE_3_VOLTAGE_ADC_CHANNEL);
ADC_VOLTAGE_CLEAR(PHASE_3_VOLTAGE_ADC_CHANNEL);
#endif
#endif
/* Pick up any current samples which may have occurred a little before the
voltage sample, but not those which may have occurred just after the
voltage sample. */
if (working_data.phases[0].metrology.current[0].in_phase_correction.sd_preloaded_offset < 128 && ADC_CURRENT_PENDING(PHASE_1_CURRENT_ADC_CHANNEL))
{
adc_i_buffer[0] = ADC_CURRENT(PHASE_1_CURRENT_ADC_CHANNEL);
ADC_CURRENT_CLEAR(PHASE_1_CURRENT_ADC_CHANNEL);
}
#if NUM_PHASES >= 2
if (working_data.phases[1].metrology.current[0].in_phase_correction.sd_preloaded_offset < 128 && ADC_CURRENT_PENDING(PHASE_2_CURRENT_ADC_CHANNEL))
{
adc_i_buffer[1] = ADC_CURRENT(PHASE_2_CURRENT_ADC_CHANNEL);
ADC_CURRENT_CLEAR(PHASE_2_CURRENT_ADC_CHANNEL);
}
#endif
#if NUM_PHASES >= 3
if (working_data.phases[2].metrology.current[0].in_phase_correction.sd_preloaded_offset < 128 && ADC_CURRENT_PENDING(PHASE_3_CURRENT_ADC_CHANNEL))
{
adc_i_buffer[2] = ADC_CURRENT(PHASE_3_CURRENT_ADC_CHANNEL);
ADC_CURRENT_CLEAR(PHASE_3_CURRENT_ADC_CHANNEL);
}
#endif

#if defined(NEUTRAL_MONITOR_SUPPORT)
#if NUM_PHASES == 1
if (working_data.phases[0].metrology.current[1].in_phase_correction.sd_preloaded_offset < 128 && ADC_CURRENT_PENDING(NEUTRAL_CURRENT_ADC_CHANNEL))
#else
if (working_data.neutral.metrology.in_phase_correction.sd_preloaded_offset < 128 && ADC_CURRENT_PENDING(NEUTRAL_CURRENT_ADC_CHANNEL))
#endif
{
adc_i_buffer[NUM_PHASES] = ADC_CURRENT(NEUTRAL_CURRENT_ADC_CHANNEL);
ADC_CURRENT_CLEAR(NEUTRAL_CURRENT_ADC_CHANNEL);
}
#endif
#endif

/*Magnetic*/
#if NUM_PHASES > 1 && defined(__MSP430_HAS_SD24_B3__) && defined(__MSP430_HAS_ADC10_A__)
ADC10CTL0 &= ~ADC10ENC;
ADC10CTL0 |= ADC10ENC;
DMA0CTL &= ~DMAIFG;
#endif

if(per_sample_dsp())
{
#if defined(__MSP430__)
/* The foreground may be conserving power (e.g. in limp mode), so we need to kick it. */
// _BIC_SR_IRQ(LPM0_bits);
#endif
}


#if defined(ENERGY_PULSE_SUPPORT) || defined(TOTAL_ENERGY_PULSE_SUPPORT)
// per_sample_energy_pulse_processing();
#endif

#if defined(__HAS_SD_ADC__)
/* There may be some current samples available, which we need to pick up */
if (ADC_CURRENT_PENDING(PHASE_1_CURRENT_ADC_CHANNEL))
{
adc_i_buffer[0] = ADC_CURRENT(PHASE_1_CURRENT_ADC_CHANNEL);
ADC_CURRENT_CLEAR(PHASE_1_CURRENT_ADC_CHANNEL);
}
#if NUM_PHASES >= 2
if (ADC_CURRENT_PENDING(PHASE_2_CURRENT_ADC_CHANNEL))
{
adc_i_buffer[1] = ADC_CURRENT(PHASE_2_CURRENT_ADC_CHANNEL);
ADC_CURRENT_CLEAR(PHASE_2_CURRENT_ADC_CHANNEL);
}
#endif
#if NUM_PHASES >= 3
if (ADC_CURRENT_PENDING(PHASE_3_CURRENT_ADC_CHANNEL))
{
adc_i_buffer[2] = ADC_CURRENT(PHASE_3_CURRENT_ADC_CHANNEL);
ADC_CURRENT_CLEAR(PHASE_3_CURRENT_ADC_CHANNEL);
}
#endif

#if defined(NEUTRAL_MONITOR_SUPPORT)
if (ADC_CURRENT_PENDING(NEUTRAL_CURRENT_ADC_CHANNEL))
{
adc_i_buffer[NUM_PHASES] = ADC_CURRENT(NEUTRAL_CURRENT_ADC_CHANNEL);
ADC_CURRENT_CLEAR(NEUTRAL_CURRENT_ADC_CHANNEL);
}
#endif
#endif

}

  • Hi Girish!

    First you should use the Syntaxhighlighter for code because this is unreadable:

    Second I don't really understand your question. Could you specify it a little bit and tell something about what you want to do and what you are working with?

    Dennis

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