Small Memory Model Vs. Large Memory Model

The phrase "lower 64 KB" can be confusing.
The device has 128 KB of Flash with address from 0x04400 to 0x143FF.
The "lower 64 KB" may refer to the Flash from 0x04400 to 0x0FFFF which is 47 KB instead of 64 KB.
(The Info Flash is not accounted for in either the 128 or the 64.)

Hi old_cow_yellow

Thanks for your reply.

old_cow_yellow said:

The device has 128 KB of Flash with address from 0x04400 to 0x143FF.

Actually, I believe the device has 128 KB of Flash from 0x04400 to 0x243FF

old_cow_yellow said:

The "lower 64 KB" may refer to the Flash from 0x04400 to 0x0FFFF which is 47 KB instead of 64 KB.

I believe the flash would go up to 0xFF7F, since 0xFF80-0xFFFF are reserved for interrupt vectors.  But either way, if my understanding is correct, the small memory model will not allow full access of Bank B, and therefore the small memory model would not allow use of 64 KB of main code memory.  Is this correct?

Thanks,

Mehdi

You are right. The device has 128 KB of Main Flash from 0x04400 to 0x243FF.

The lower 64 KB of main Flash or Bank A is at 0x04400 to 0x143FF, and the upper 64 KB of Main Flash or Bank B is at 0x14400 to 0x243FF.

My point is, when they say that the small memory model can only use the "lower 64 KB", they mean it can only use memory in the lower 64 KB address space from 0x00000 to 0x0FFFF. This "lower 64 KB" include Special Function Registers, Peripheral Registers, BSL Flash, Infor Flash, RAM, and only 47 KB of the lower 64 KB of main Flash -- not the entire Bank A.

Your other point is about Interrupt Vectors and Reset Vector. They must be allocated to certain fixed locations in the lower 64 KB address space too. They take away at least 2, but potentially more bytes.

And, well, the interrupt vectors are put into flash and can (besides their special meaning as interrupt vectors) be accessed by the CPU like any flash. Unused interrupt vectors can contain data or even code. Looking at this from the flash point of view, the interrupt vectors are just in the middle of bank A, but form the CPU point of views, they are at the end of the first 64k of address space, and at the end of what the CPU can address in small memory model. (or rather, what code can access with only using the standard CPU instructions, as the CPU itself is of course not restricted)
it should be noted that you need to differentiate between code and data model. large code model will use extended commands to call and execute functions in flash above address 0x0FFFF. It only adds two clock cycles for each function call and return, and two bytes more code for the function call and two bytes more stack space for the return address.
Large data model is independent and uses 20 bit addresses for data access. Which significantly affects code size and performance but is needed if you have large data tables in flash above 0x0FFFF, or have an MSP with additional ram above 0x0FFFF (there are a few with 64k ram).
Note that ISRs need to be below 0x10000 in any case, as the interrupt vectors are only 16 bit addresses.

Thanks for all the help everyone.

I want to ask another question relating to erasing the flash. On the MSP430F5342, Bank B contains the interrupt vectors. Is it possible to perform a bank erase on Bank B without touching the interrupt vectors? I tried to perform a Bank erase, and it also reset the interrupt vectors (0xFF80-0xFFFF).

To preserve the interrupt vectors, you can either erase the other sectors one by one or backup the vectors before you erase the entire bank -- and restore the vectors after that.

Hi old_cow_yellow,

Thanks for the reply. In your opinion, which represents a safer coding practice?

My initial goal in doing a bank erase was to minimize time in erasing the flash. According to the MSP430F5342 datasheet, a flash erase can take 23-32 ms.

However, in allocating code space and flash variable space, I have set up my code such that it falls in Bank A, and flash variables will be in Bank B. If I understand the datasheet properly, it would be possible for me to run code in Bank A while erasing Bank B. Of course, I will still not be able to run interrupt service routines while erasing flash (regardless of which Bank/segment is being erased). Is this correct?

Either way can be quite safe.

Are you aware of the SYSRIVECT bit in the SYSCTl register? At power-up or reset, you can copy the Interrupt Vectors from Flash to RAM and use it. This opens up an entire new world.