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MSP430x5xx LPM2 vs LPM3

Fred P
Expert 2235 points


I would like to know more about the differences between LPM2 and LPM3.  All I have found in the UG is on page 63  and it looks quite identical (see below)!  Where does the additional power saving come from?

Also, If I were to source all peripherals with ACLK (sourced itself by XT1), would I see a significant power consumption difference between LPM0, 1 , 2 and 3?

I don't use DCO nor FLL at all.

LPM2

CPU, MCLK are disabled.
ACLK is active. SMCLK is disabled.
DCO is enabled if sources ACLK.
FLL is disabled.

LPM3

CPU, MCLK are disabled.
ACLK is active. SMCLK is disabled.
DCO is enabled if sources ACLK.
FLL is disabled.

Thanks

  • 0
    TI__Mastermind 22685 points

    Hi Fred,

    The difference between LPM2 and LPM3 is the setting of the SCG0 bit (one of the enable bits for the FLL).  LPM2 leaves this bit cleared, and LPM3 sets it high.  When waking up from LPM (for an interrupt service request), SCG0 is NOT modified.  This means than waking up from LPM3 into an ISR leaves the FLL disabled (SCG0 stays 1), but waking up from LPM2 into an ISR enables the FLL.  The other difference is that by leaving SCG0 as a 0 in LPM2, it causes additional current draw during low power due to SCG0 and SCG1 controlling different sections of the FLL and DCO blocks.  Leaving SCG0 leaves the 10-bit frequency integrator powered, even though it is effectively not used because SCG1 shuts off the DC Generator for the DCO block (see the block diagram on page 157 of the F5xx/6xx Users Guide).

    If you are not using the DCO or the FLL and source all peripherals from ACLK (sourced from XT1), you would still see some difference between the LPM modes as the modules are still powered (though unused).  If you are only using ACLK, there is no need for LPM0,1,2 in your system so you might as well just use LPM3 and minimize current consumption.

    Mike

  • 0
    Guru 227245 points
    The problem with the LPMs is, that there are no LPMs. What is called LPMx is just a predefined combination of the four control bits in the status register. So in theory, there would be 16 different LPMs possible, even if some of them do not make much sense.
    the LPM4 macro is just an alias for a __BIS_SR_REGISTER(GIE|CPUOFF|OSCOFF|SCG0|SCG1). And these bits have specific effects. Or not, if overridden by other parameters(like CPUOFF is overridden when DMA requires MCLK, OSCOFF is overridden if a module makes an unconditional request to ACLK, SCG0 is overridden if SMLCK, MCLK or ACLK require the DCO etc.)
    Hiding all this behind "LPMx' is convenient, but also a source of confusion if people do not know what it really means.

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