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MSP 430 SD24 ADC Result value and back conversion Issue

Hi  iam new to MSP430 SD24, Please help

after reading the datasheet I am confused about the Conversion result ,and reconversion of the result back to voltage.

I could not find register to set SD24 adc in unipolar  mode.also, my input to ADC is in  0-200mv  range .

For 30 mV input I am getting Result = 0x00833955 . When i back calculated iam not getting the 30 mV

And with out giving any input ADC is reading some values .

I am USING MSP430F6451a controller.

ADC Settings

Vref - internal 1.2v

Bipolar ,Binary ,Right aligned result.

Below is my code :

//////////////////////////////////////////////////////////////

volatile unsigned long  results[6];

int main(void)
{
    WDTCTL = WDTPW | WDTHOLD;    // Stop watchdog timer


    SD24BCTL0 = SD24SSEL__SMCLK     /* Clock is SMCLK */
              | SD24PDIV_3          /* Divide by 16  */
              | SD24DIV3          
              | SD24REFS            /* Use internal reference */
              | SD24OV32;
    SD24BCTL1 = 0;

    SD24BTRGOSR = OSR__256;

    SD24BCCTL0 =  SD24SCS_4;      // Right-aligned, group 0 ,


    SD24BINCTL0 |= SD24GAIN_1;////Select gain 1

    SD24BPRE0 = 0; //Digital filter preload value

    SD24BIE = SD24IE2;                      // Enable  interrupt


    __delay_cycles(0x3600);                 // Delay

    SD24BCTL1 |= SD24GRP0SC;                // Set bit to start conversion
    __bis_SR_register(GIE);  

while(1);

}

///////////////////////////////////////////////////////////////////////////////////

#pragma vector=SD24B_VECTOR
__interrupt void SD24BISR(void)
{
  
    switch (SD24BIV)
    {
        case SD24BIV_SD24OVIFG:             // SD24MEM Overflow
            break;
        case SD24BIV_SD24TRGIFG:            // SD24 Trigger IFG
            break;
        case SD24BIV_SD24IFG0:              // SD24MEM0 IFG
            break;
        case SD24BIV_SD24IFG1:              // SD24MEM1 IFG
            break;
        case SD24BIV_SD24IFG2:              // SD24MEM2 IFG

            results[0] = SD24BMEMH0;        // Save CH0 results (clears IFG)
            results[0] = (results[0] << 16) | SD24BMEML0; // Concatenate lower and upper words         

            break;
    }

    __bic_SR_register_on_exit(LPM0_bits);   // Exit LPM0
}

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