SPI communication between two MSP430g2553

Swapnil%20Phirke

Other Parts Discussed in Thread: MSP430G2553

I am trying to communicate with two msp430g 2553 one as slave and other as master .I am able to receive data at slave but it is only 0xFF .it does not matter what data i am sending .

Code for master

#include <msp430g2553.h>

long i=0;
unsigned char MST_Data, SLV_Data;
int received_ch;
void main(void) {
	WDTCTL = WDTPW + WDTHOLD; 			// Stop watchdog timer

	P1DIR |= BIT0;
	P1DIR |= BIT5;
	P1SEL &= ~0x08;					// Select Port 1 P1.3 (push button)
     P1DIR &= ~0x08;					// Port 1 P1.3 (push button) as input, 0 is input
	P1REN |= 0x08;						// Enable Port P1.3 (push button) pull-up resistor

	P1IE |= 0x08;						// Port 1 Interrupt Enable P1.3 (push button)

	P1IFG &= ~0x08;					// Clear interrupt flag

	P1SEL  =   BIT1    |   BIT2    |   BIT4;
	P1SEL2 =   BIT1    |   BIT2    |   BIT4;
	  MST_Data = 0x01;                          // Initialize data values
	  SLV_Data = 0x00;


	UCA0CTL1   =   UCSWRST;
	UCA0CTL0   |=  UCCKPH  +   UCMSB   +   UCMST   +   UCSYNC; //  3-pin,  8-bit   SPI master
	UCA0CTL1   |=  UCSSEL_2;   //  SMCLK
	UCA0BR0    |=  0x02;   //  /2
	UCA0BR1    =   0;  //
	UCA0MCTL   =   0;  //  No  modulation
	UCA0CTL1   &=  ~UCSWRST;   //  **Initialize    USCI    state   machine**


	_BIS_SR(GIE);		           		// Enable interrupts

	while(1) i++;                  		// Execute some useful computation
}
									// Port 1 interrupt service routine
#pragma vector=PORT1_VECTOR
      __interrupt void Port_1(void) {

    	  MST_Data++;                               // Increment master value
 		  SLV_Data++;                               // Increment expected slave value

	P1IFG &= ~0x08; 					// P1.3 Interrupt Flag cleared
	P1OUT ^= BIT0;

//	P1OUT  &=  (~BIT5);    //  Select  Device
//	P1OUT  &=  (~BIT5);    //  Select  Device
	P1OUT  |=  (BIT5); //  Unselect    Device

	__delay_cycles(500);

		while  (!(IFG2 &   UCA0TXIFG));    //  USCI_A0 TX  buffer  ready?
		UCA0TXBUF  =   MST_Data;   //  Send    0xAA    over    SPI to  Slave
		while  (!(IFG2 &   UCA0RXIFG));    //  USCI_A0 RX  Received?
		received_ch    =   UCA0RXBUF;  //  Store   received    data

//		P1OUT  |=  (BIT5); //  Unselect    Device
		P1OUT  &=  (~BIT5);    //  Select  Device
	//	P1OUT  |=  (BIT5); //  Unselect    Device


	i = 0; 							// Reset count
}

Code for slave

#include <msp430g2553.h>

long i=0;
unsigned char MST_Data, SLV_Data;
int received_ch;

void main(void) {
	WDTCTL = WDTPW + WDTHOLD; 			// Stop watchdog timer

	P1DIR |= BIT0;
	P1SEL &= ~BIT5;					// Select Port 1 P1.3 (push button)
     P1DIR &= ~BIT5;					// Port 1 P1.3 (push button) as input, 0 is input
	P1REN |= BIT5;						// Enable Port P1.3 (push button) pull-up resistor

	P1IE |= BIT5;						// Port 1 Interrupt Enable P1.3 (push button)

	P1IFG &= ~BIT5;					// Clear interrupt flag

	P1SEL  =   BIT1    |   BIT2    |   BIT4;
	P1SEL2 =   BIT1    |   BIT2    |   BIT4;
	  MST_Data = 0x01;                          // Initialize data values
	  SLV_Data = 0x00;


	UCA0CTL1   =   UCSWRST;
	UCA0CTL0   |=  UCCKPH  +   UCMSB   +   UCSYNC; //  3-pin,  8-bit   SPI master
	UCA0CTL1   |=  UCSSEL_2;   //  SMCLK
	UCA0BR0    |=  0x02;   //  /2
	UCA0BR1    =   0;  //
	UCA0MCTL   =   0;  //  No  modulation
	UCA0CTL1   &=  ~UCSWRST;   //  **Initialize    USCI    state   machine**


	_BIS_SR(GIE);		           		// Enable interrupts

	while(1) i++;                  		// Execute some useful computation
}
									// Port 1 interrupt service routine
#pragma vector=PORT1_VECTOR
      __interrupt void Port_1(void) {

    	  MST_Data++;                               // Increment master value
 		  SLV_Data++;                               // Increment expected slave value

	P1IFG &= ~BIT5; 					// P1.3 Interrupt Flag cleared
	P1OUT ^= BIT0;

//	P1OUT  &=  (~BIT5);    //  Select  Device
//	P1OUT  |=  (BIT5); //  Unselect    Device
	//__delay_cycles(500);

		while  (!(IFG2 &   UCA0RXIFG));    //  USCI_A0 RX  Received?
		received_ch    =   UCA0RXBUF;  //  Store   received    data
		while  (!(IFG2 &   UCA0TXIFG));    //  USCI_A0 TX  buffer  ready?
		UCA0TXBUF  =   0x14;   //  Send    0xAA    over    SPI to  Slave

//		P1OUT  |=  (BIT5); //  Unselect    Device
//		P1OUT  &=  (~BIT5);    //  Select  Device


	i = 0; 							// Reset count
}

Please help me where I am doing wrong msp430g2553

over 10 years ago

0 Dennis Eichmann over 10 years ago

Guru 74080 points

Swapnil,

PORT1_VECTOR is not the right one only because the USCI is on port 1 of the micro. This one is for interrupt flags caused by edge triggered events. You have to use the transmit and receive interrupts for the USCI module. Look at the code examples for the processor.

Dennis

0 Swapnil%20Phirke over 10 years ago in reply to Dennis Eichmann

Prodigy 65 points

I tried without PORT1 interrupt still same issue

for master

#include <msp430g2553.h>

long i=0,j;
int MST_Data, SLV_Data;
int received_ch;
void main(void) {
	WDTCTL = WDTPW + WDTHOLD; 			// Stop watchdog timer


	  BCSCTL1 = CALBC1_1MHZ;                    // Set DCO to 1MHz
	  DCOCTL  = CALDCO_1MHZ;

	P1DIR |= BIT0;
	P1DIR |= BIT5;
	P1SEL &= ~0x08;					// Select Port 1 P1.3 (push button)
     P1DIR &= ~0x08;					// Port 1 P1.3 (push button) as input, 0 is input
	P1REN |= 0x08;						// Enable Port P1.3 (push button) pull-up resistor

	P1IE |= 0x08;						// Port 1 Interrupt Enable P1.3 (push button)

	P1IFG &= ~0x08;					// Clear interrupt flag

	P1SEL  =   BIT1    |   BIT2    |   BIT4;
	P1SEL2 =   BIT1    |   BIT2    |   BIT4;
	  MST_Data = 0x01;                          // Initialize data values
	  SLV_Data = 0x00;


	UCA0CTL1   =   UCSWRST;
	UCA0CTL0   |=  UCCKPH  +   UCMSB   +   UCMST   +   UCSYNC; //  3-pin,  8-bit   SPI master
	UCA0CTL1   |=  UCSSEL_2;   //  SMCLK
	UCA0BR0    |=  0x02;   //  /2
	UCA0BR1    =   0;  //
	UCA0MCTL   =   0;  //  No  modulation
	UCA0CTL1   &=  ~UCSWRST;   //  **Initialize    USCI    state   machine**


	_BIS_SR(GIE);		           		// Enable interrupts

	while(1)
		{
		while  (!(IFG2 &   UCA0TXIFG));    //  USCI_A0 TX  buffer  ready?
				UCA0TXBUF  =   MST_Data;   //  Send    0xAA    over    SPI to  Slavei++;
			  	  MST_Data++;                               // Increment master value
		 		  SLV_Data++;                               // Increment expected slave value
		 		 P1OUT ^= BIT0;
		 		 for(j=0;j<50;j++)
		 		 {
		 			 __delay_cycles(5000);
		 		 }
// Execute some useful computation
		}
}

and for slave

#include <msp430g2553.h>

long i=0;
unsigned char MST_Data, SLV_Data;
int received_ch;

void main(void) {
    WDTCTL = WDTPW + WDTHOLD;             // Stop watchdog timer


      BCSCTL1 = CALBC1_1MHZ;                    // Set DCO to 1MHz
      DCOCTL  = CALDCO_1MHZ;

    P1DIR |= BIT0;
    P1SEL &= ~BIT5;                    // Select Port 1 P1.3 (push button)
     P1DIR &= ~BIT5;                    // Port 1 P1.3 (push button) as input, 0 is input
    P1REN |= BIT5;                        // Enable Port P1.3 (push button) pull-up resistor

    P1IE |= BIT5;                        // Port 1 Interrupt Enable P1.3 (push button)

    P1IFG &= ~BIT5;                    // Clear interrupt flag

    P1SEL  =   BIT1    |   BIT2    |   BIT4;
    P1SEL2 =   BIT1    |   BIT2    |   BIT4;
      MST_Data = 0x01;                          // Initialize data values
      SLV_Data = 0x00;


    UCA0CTL1   =   UCSWRST;
    UCA0CTL0   |=  UCCKPH  +   UCMSB   +   UCSYNC; //  3-pin,  8-bit   SPI master
    UCA0CTL1   |=  UCSSEL_2;   //  SMCLK
    UCA0BR0    |=  0x02;   //  /2
    UCA0BR1    =   0;  //
    UCA0MCTL   =   0;  //  No  modulation
    UCA0CTL1   &=  ~UCSWRST;   //  **Initialize    USCI    state   machine**


    _BIS_SR(GIE);                           // Enable interrupts

    while(1)
        {
        while  (!(IFG2 &   UCA0RXIFG));    //  USCI_A0 RX  Received?
        received_ch    =   UCA0RXBUF;  //  Store   received    data
        P1OUT ^= BIT0;
        i++;                          // Execute some useful computation
        }
}

still at slave I am receiving only 0xFF

0 Jens-Michael Gross over 10 years ago in reply to Swapnil%20Phirke

Guru 227245 points

Did you cross the I/O lines? For devices with USI module, there is an output and an input line, independent of the role (master/slave), and input needs to be connected to the other side's output.
The USCI, however, changes direction depending on the role. So SIMO is to be connected to SIMO (Slave-In-Master-Out) and SOMI to SOMI. If you cross them, both outputs will work against each other and both inputs will listen on each other (and not hearing anything).
Since SPI is synchronous, it will always 'receive' a byte after 8 clock cycles, whether there is someone speaking or not.

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SPI communication between two MSP430g2553