Accessing flash memory

Hi!
If you want to use the memory above 64K fore code execution, (flash or anything else, some models also have RAM there), you will have to compile with large memory model (20-bit addressing mode). For GCC this is the -mlarge option, and for the msp430 compiler it is --code_model=large and --data_model=large. Moreover, for GCC you will have to modify the linker script to place code (.text) or data in the high ROM. Currently it is not possible to split the code between the two regions, but you can still use the lower ROM for constants (.rodata) and you have to put the interrupts there anyway..
The TI linker does the code splitting with the default, you dont even have to modify the linker script just enable the flags I mentioned above.
IF you want to access the memory contents directly, you can use the intrinsics __data20_read(write)_char() and the like which work with the whole address space.

See this thread for a GCC linker script snippet to use the high ROM:
e2e.ti.com/.../1269547

MSP430F5335 chip has a total of 258.5KB Flash memory. This includes 256KB Main Flash, 0.5KB Info Flash, and 2KB BSL Flash.
All parts of Main Flash memory are accessible for fetch/read/erase/write. But only the first 32KB with the lowest address can be accessed with 16-bit Address. The other 224KB must be accessed with 20-bit Address. Sample assembly code is included in the Family User's Guide (SLAU208). For c-code, various compiler/linker tools impose additional limitations. Gabor Hencz already answered you about that.

Hi,

Thanks for your explanantion. I have quite confusion on accessing the code memorey of MSP430F5335. If we look th data sheet the memory as splitted as follows Info memeory, BSL and Flash memory bank A, bank B, bank C, bank D. The sample code are explaing the logic about programming in the info memory. Can we able to do same kind of write and read in flash memory bank A, bank B, bank C, bank D or it will possible only sending BSL command through UART.

 

Thanks in advance.

 

 

The memory 'banks' refer to the internal organization of the flash memory and not it's address in the processor memory address range. Knowing the mapping becomes important if you want to use the special bank erase mode, which can erase a 64k bank in one step but leave the other banks untouched (even in operation during the erase).
Also, the info memory and the BSL memory are separate smaller banks that can be excluded from a mass erase.
Don't confuse Bank A..D (64k each) with info memory segment A..D (64..256 bytes each, erased with either segment erase or a mass erase)

The memory address placement has historical reasons. Even with 20 bit addressing instructions, the interrupt vector table must reside right below 64k (0x10000), and since interrupt vectors are only 16 bit, all interrupt functions must reside there too. But part of this area is also occupied by hardware registers and ram, so a (physical) flash bank doesn't start at (logical)0xX0000.