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Problem in using TA0EX0 for dividing the ACLK.

Hi,

I am using Timer A0 and XT2 crystal of 4MHz.I have configured ACLK for XT2 i.e 4Mz crystal.  As I am using 4 Mhz my input clock for timer is 4Mz. I have configured TA0CTL ID(Input divider) for 8. So my frequency becomes 500000Hz. I have again configured TA0EX0   --TAIDEX for 2. So now my clock input for timer should be 500000/2 = 250000 i.e 250 khz.

But I am getting 1Mz. Instead of dividing it is getting multiplied.

What is error?  Is there any problem in configuration?

Why I am not getting proper clock input for timer?

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