I need to use three I/O pins of my MPS430fr5969 to create four PWMs and then simultaneously, i need my adc to sample two signals. My PWM code is the following :
#include <msp430.h>
int main(void)
{
WDTCTL = WDTPW | WDTHOLD; // Stop WDT
// Configure GPIO
P1DIR |= BIT2 | BIT3 | BIT4 | BIT5 ; // P1.0 and P1.1 output
P1SEL0 |= BIT2 |BIT3 | BIT4 | BIT5 ;
// P1.0 and P1.1 options select
// Disable the GPIO power-on default high-impedance mode to activate
// previously configured port settings
PM5CTL0 &= ~LOCKLPM5;
CSCTL0_H = CSKEY >> 8; // Unlock CS registers
CSCTL1 = DCOFSEL_6; // Set DCO = 8MHz
CSCTL2 = SELA__VLOCLK | SELS__DCOCLK | SELM__DCOCLK;// Set ACLK=VLO SMCLK=DCO
CSCTL3 = DIVA__8 | DIVS__8 | DIVM__8; // Set all dividers
CSCTL0_H = 0; // Lock CS registers
// Configure Timer0_A
TA1CCR0 = 20000-1; // PWM Period
TA1CCTL1 = OUTMOD_7; // CCR2 reset/set
TA1CCR1 = 100; // CCR1 PWM duty cycle
TA1CCTL2 = OUTMOD_7; // CCR2 reset/set
TA1CCR2 = 100;
TB0CCR0 = 4000-1;
TB0CCTL1 = OUTMOD_7; // CCR1 reset/set
TB0CCR1= 100;
TB0CCTL2 = OUTMOD_7; // CCR1 reset/set
TB0CCR2 = 4000; // CCR2 PWM duty cycle
TA1CTL = TASSEL__SMCLK | MC__UP | TACLR; // SMCLK, up mode, clear TAR
// CCR1 PWM duty cycle
// CCR2 PWM duty cycle
TB0CTL = TBSSEL__SMCLK | MC__UP | TBCLR; // SMCLK, up mode, clear TBR
__bis_SR_register(LPM0_bits); // Enter LPM0
__no_operation(); // For debugger
}
Now, that I have already used three pins 1.2,1.3,1.4,1.5 for creating PWM , is it possible to add the firmware for dual channel ADC sampling ?...Will the ADC timers affect my PWM ( Do I need to configure the DMA since, I also need to push the digital output using UART)...
How exactly are the i/o pins connected to ADC...How to select the I/O pins for both the signal sampling so that my PWM is affected?...adc