Other Parts Discussed in Thread: DRV8844, MSP-EXP430F5529LP
I am using timer A0 in up-down mode to generate PWM signals with dead time. One ADC input sets the timer period. Another input sets the pulse width. The period input works but the pulse width does not. The pulse width takes the form of toggle-set and toggle-reset as explained in section 17.2.3.5 of the family data sheet. The entire code was posted previously here, and it is still the same except for the while(1) block which I post below:
while(1)
{
ADC12_A_startConversion(ADC12_A_BASE,
ADC12_A_MEMORY_0,
ADC12_A_SEQOFCHANNELS);
timer_period = (frequency_input + 100) * 4;
TA0CCR0 = timer_period;
toggle_reset = (timer_period * acceleration_input) >> 13;
// if (toggle_reset > (timer_period/2 - 100))
// toggle_reset = timer_period/2 - 100;
toggle_set = timer_period - toggle_reset;
TA0CCR1 = toggle_set;
TA0CCR2 = toggle_reset;
// __bis_SR_register(LPM4_bits + GIE);
__bis_SR_register(GIE);
//For debugger
__no_operation();
}
The 12-bit duty cycle input is in the acceleration_input variable. I need to continually proportion toggle_reset to the timer period, and it also needs to be less than 1/2 of the timer period. I do this by multiplying the timer period by acceleration_input, then right-shifting the result 13 bits. The problem is that toggle_reset almost never (but sometimes does) show up in CCS watch expressions. When it does, it is the same as the timer period. I previously was dividing the product by 8192, but got the same buggy behavior as right-shifting when running debug. Any suggestions on how I may accomplish this bit of math?
