>SOLVED< MSP430G2553 ADC10 repeated single channel with DTC block transfer - why is ADC10BUSY still set after block transfer has finished?

...

#define ADC_AVERAGE_COUNT 8

#define ADC_FLG_WAIT_FOR_IDLE     0x80
#define ADC_FLG_RESULTS_AVAILABLE 0x40
#define ADC_FLG_CHANNEL_1_ACTIVE  0x01
#define ADC_FLG_CHANNEL_2_ACTIVE  0x02

volatile uint8_t adc_status = ADC_FLG_CHANNEL_1_ACTIVE;      // Start with channel (A0)

...

volatile uint16_t adc_average_samples[2][ADC_AVERAGE_COUNT]; // Array for holding multiple samples of two channels

...

void main( void )
{
  ...

  // Vref+/Vss, 64 clocks S&H, ref output on, multiple sample and conversion, 2,5V ref, ref on, ADC10 on, interrupt enable
  ADC10CTL0  = (SREF_1 | ADC10SHT_3 | REFOUT | MSC | REF2_5V | REFON | ADC10ON | ADC10IE);
  // Channel A0 selected, ADC10CS bit as trigger, clock divider 0, ADC10OSC, repeat single channel
  ADC10CTL1  = (INCH_0 | SHS_0 | ADC10DIV_0 | ADC10SSEL_0 | CONSEQ_2);
  // Analog input A0 and A3 enabled
  ADC10AE0   = (0x01 | 0x08);

  ...

  __bis_SR_register( GIE );                               // Enable global interrupts

  ADC10DTC1 = ADC_AVERAGE_COUNT;                          // Set number of samples
  ADC10SA = &adc_average_samples[0][0];                   // Set start address
  ADC10CTL0 |= (ENC | ADC10SC);                           // Enable and start conversion

  while( 1 )
  {
    if( adc_status & ADC_FLG_WAIT_FOR_IDLE )              // Request to wait for ADC idle again
    {
      if( !(ADC10CTL1 & ADC10BUSY) )                      // Check if ADC is not busy
      {
        adc_status &= ~ADC_FLG_WAIT_FOR_IDLE;             // Clear flag

        if( adc_status == ADC_FLG_CHANNEL_1_ACTIVE )      // Channel 1
        {
          adc_status = ADC_FLG_CHANNEL_2_ACTIVE;          // Set new status
          ADC10CTL1 &= ~INCH_0;                           // Disable channel A0
          ADC10CTL1 |= INCH_3;                            // Enable channel A3
          ADC10SA = &adc_average_samples[1][0];           // Set start address
          ADC10CTL0 |= (ENC | ADC10SC);                   // Enable and start conversion
        }
        else if( adc_status == ADC_FLG_CHANNEL_2_ACTIVE ) // Channel 2
        {
          adc_status = ADC_FLG_CHANNEL_1_ACTIVE;          // Set new status
          ADC10CTL1 &= ~INCH_3;                           // Disable channel A3
          ADC10CTL1 |= INCH_0;                            // Enable channel A0
          ADC10SA = &adc_average_samples[0][0];           // Set start address
          adc_status |= ADC_FLG_RESULTS_AVAILABLE;        // Set flag to signal new data to process
        }
      }
    }

    if( adc_status & ADC_FLG_RESULTS_AVAILABLE )          // Request for processing data
    {
      ... // Process data

      adc_status &= ~ADC_FLG_RESULTS_AVAILABLE;           // Clear flag
      ADC10CTL0  |= (ENC | ADC10SC);                      // Enable and start conversion
    }

    ... // Do other things in main
  }
}

#pragma vector = ADC10_VECTOR
__interrupt void ADC10_ISR ( void )
{
  ADC10CTL0  &= ~ENC;                                     // Disable conversions
  adc_status |= ADC_FLG_WAIT_FOR_IDLE;                    // Set flag to signal waiting for ADC idle
}