How to enter and exit from LPM4 inside comparator_D interruption on MSP430fr5739?

Inside an interrupt handler, GIE is automatically cleared to prevent the function from being interrupted by another or the same interrupt.

When you go into LPM inside an interrupt handler, the cleared GIE prevents any interrupts that could get the CPU out of LPM from being executed.

When you want to go to sleep, you should do so after the interrupt handler has returned. This is what __bis_SR_register_on_exit() is for.

However, the typical pattern is that the main loop goes to sleep when it has nothing to do, and that interrupt handlers wake up the main loop with __bic_SR_register_on_exit() when they need to.

BTW: You forgot the main loop; execution falls out of the end of main().

Thanks for your answer. In that case, is possible to enter and exit from LPM4 inside the comparator? I'm trying to do it with the following code but is not working:

#include <msp430.h>
unsigned int l=0;
int main(void)
{
WDTCTL = WDTPW + WDTHOLD; // Stop WDT
PJDIR |= BIT0; // P1.0/LED output direction
// compare input
P1SEL0 |= BIT1; // P1.1/CD1
P1SEL1 |= BIT1;

// Setup ComparatorB
CDCTL0 |= CDIPEN + CDIPSEL_1; // Enable V+, input channel CD1
CDCTL2 |= CDRSEL; // VREF is applied to -terminal
CDCTL2 |= CDRS_3+CDREFL_1; // R-ladder off; bandgap ref voltage (1.2V)
// supplied ref amplifier to get Vcref=1.5V (CDREFL_2)
CDCTL3 |= BIT1; // Input Buffer Disable @P1.1/CD1

__delay_cycles(400); // delay for the reference to settle

CDINT &= ~(CDIFG + CDIIFG); // Clear any errant interrupts
CDINT |= CDIE; // Enable CompB Interrupt on rising edge of CDIFG (CDIES=0)
CDCTL1 |= CDON; // Turn On ComparatorB
__bis_SR_register(GIE);
while(1)
{
if (l==100)
l=0;
l++;
}
__no_operation(); // For debug
}

// Comp_d ISR - LED Toggle
#if defined(__TI_COMPILER_VERSION__) || defined(__IAR_SYSTEMS_ICC__)
#pragma vector=COMP_D_VECTOR
__interrupt void Comp_D_ISR (void)
#elif defined(__GNUC__)
void __attribute__ ((interrupt(COMP_D_VECTOR))) Comp_D_ISR (void)
#else
#error Compiler not supported!
#endif
{
//l++;
CDCTL1 ^= CDIES; // Toggles interrupt edge
// __bis_SR_register(GIE);
if (l%2==0)
{
__bis_SR_register(LPM4_bits);

}
//__bic_SR_register_on_exit(LPM4_bits);
PJOUT ^= 0x01; // Toggle P1.0
P3DIR |= BIT5;
P3SEL1 |= BIT5;
P3SEL0 |= BIT5;
CDINT &= ~(CDIFG + CDIIFG);
CDINT &= ~CDIFG; // Clear Interrupt flag
}

Hi, thanks for your answer.  What I'm trying to do is when the Vcomp is smaller than Vref0, system should go to sleep and when Vcomp is bigger than Vref1, system should exit from LPM4. I'm programming the interruption as follows just to test what you told me before, but I don't know why the system is kept inside the interruption routine, I mean, when the system exits from LPM4, instead of going to the main loop, it goes to line "l2++" and starts again executing all inside the interruption :

#pragma vector=COMP_D_VECTOR

__interrupt void COMP_D_ISR(void)

{

l2++;

//CDCTL1 ^= CDIES; // Toggles interrupt edge

m=__get_SR_register();

//CDINT &= ~(CDIFG + CDIIFG);

PJOUT ^= 0x01; // Toggle P1.0

P3DIR |= BIT5;

P3SEL1 |= BIT5;

P3SEL0 |= BIT5;

__bis_SR_register_on_exit(LPM4_bits);

}

HI, Thanks for your answer.

Yes, what you wrote is what I want to implement. I followed your pseudocode but when the system enters in LPM4, never exits. I added my code:

#include <msp430.h>

unsigned int int_edge=0;

unsigned int l=0;

int main(void)

{

WDTCTL = WDTPW + WDTHOLD; // Stop WDT

int_edge=0;

// compare input

P1SEL0 |= BIT1; // P1.1/CD1

P1SEL1 |= BIT1;

// Compare output

P3DIR |= BIT5;

P3SEL1 |= BIT5;

P3SEL0 |= BIT5;

// Setup Comparatord

CDCTL0 |= CDIPEN + CDIPSEL_1; // Enable V+, input channel CD0

CDCTL2 |= CDRSEL; // VRef is applied to -terminal

//CDCTL2 |= CDRS_1+CDREF13; // VREF1 is Vcc*1/4

//CDCTL2 |= CDREF04+CDREF03; // VREF0 is Vcc*3/4

CDCTL2 |= CDRS_3+CDREFL_1; // R-ladder off; bandgap ref voltage (1.5V)

/*CDCTL2|=CDRS_1;

CDCTL2 |= CDREF14+CDREF13; // VREF1 is Vcc*3/4

CDCTL2 |= CDREF03+CDREF02;; // VREF0 is Vcc*1/4*/

CDCTL3 |= BIT1; // Input Buffer Disable @P1.1/Cd1

CDCTL1|=CDIES;

__delay_cycles(400); // delay for the reference to settle

CDINT |= CDIE; // Enable CompB Interrupt on rising edge of CDIFG (CDIES=0)

CDINT &= ~(CDIFG + CDIIFG); // Clear any errant interrupts

CDCTL1 |= CDON; // Turn On Comparatord

__bis_SR_register(GIE);

while(1)

{

if (l==40)

l=0;

l++;

}

}

#pragma vector=COMP_D_VECTOR

__interrupt void COMP_D_ISR(void)

{

// Compare output

if (int_edge==0)

{

//falling edge handling

CDCTL1 ^= CDIES; // Toggles interrupt edge

int_edge=1;

__bis_SR_register_on_exit(LPM4_bits + GIE); //after exiting ISR, go to LPM4 and wait for the next comp interrupt, rising edge

}

else

{

//rising edge handling

CDCTL1 ^= CDIES; // Toggles interrupt edge.

int_edge=0;

__bic_SR_register_on_exit(LPM4_bits); //wake part up and go back to main when exiting ISR this time

}

CDINT &= ~(CDIE);

}

Hi,

Yeah, it was my error. Thank you very much for your help. It seems it's working now. :)

So glad to hear this got you up and running! :-)