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MSP432P401R Random Number Generator using TimerA

Jimmy Wein
Intellectual 260 points

Hello!

I've come across an example of generating 16-bit random numbers with the use of TimerA, ACLK and SMCLK. TI's wiki code for the MSP430 model is the following:

int TI_getRandomIntegerFromVLO(void)
{
  unsigned int i;
  int result = 0;
 
  // setup Timer_A
  TA0CCTL1 = CM_1 + CCIS_1 + CAP;
  TA0CTL |= TASSEL__SMCLK + MC__CONTINUOUS;
 
  for(i=0 ; i<16 ; i++)
  {
    // shift left result
    result <<= 1;
 
    // wait until Capture flag is set
    while(!(TA0CCTL1 & CCIFG));
 
    // clear flag
    TA0CCTL1 &= ~CCIFG;
 
    // check LSB
    if(TA0CCR1 & 0x01)
    {
      result |= 0x01;
    }
 
    // change the divison of timer input clock
    TA0CTL = (TA0CTL & 0xFCFF) | ((TA0CCR1 & 0x03) << 8);
  }
 
  return result;
}

It is simple enough and I tried recreating it for MSP432 in Code Composer 6.1, but with no luck so far. Register addresses remain the same if I'm doing this correctly (TA0CCTL1 can get internal ACLK as input via CCIS_1 on both boards), but somehow it gets stuck at the "while(!(TA0CCTL1 & CCIFG));", never moving forward. The only thing I added is the line to set VLO as a source for ACLK:

CSCTL1 = (CSCTL1 & ~(SELA_M | DIVA_M)) | SELA_1;

Does anyone have any idea? Any help would be greatly appreciated.

  • 0
    Guru 74080 points
    Have you measured if ACLK is running properly by outputting it to a pin?
  • 0 in reply to Dennis Eichmann
    Intellectual 260 points
    Yes, ACLK has the frequency of VLO at around 9.6 kHz (pin output measured with oscilloscope).
  • 0 in reply to Jimmy Wein
    Guru 23000 points
    In the code you show you have sourced TA from SMCLK which is a product of MCLK and will never generate a Random number.
    You need to source your TA from ACLK which must be connected to another oscillator than which MCLK is connected.
  • 0 in reply to Jimmy Wein
    Guru 46710 points
    >Yes, ACLK has the frequency of VLO at around 9.6 kHz (pin output measured with oscilloscope).
    Good. Then connect ACLK output to P2.4 configured as input and use CCIS_0 (CCI1A), check if it works this way - using external capture signal.
  • 0 in reply to Ilmars
    Intellectual 260 points

    Ilmars said:
    >Yes, ACLK has the frequency of VLO at around 9.6 kHz (pin output measured with oscilloscope).
    Good. Then connect ACLK output to P2.4 configured as input and use CCIS_0 (CCI1A), check if it works this way - using external capture signal.

    It works! I've physically connected P4.2  (ACLK) with P2.5 (input for CCR2), changed TA0CCTL1 to TA0CCTL2 and the output seems to be unsigned 16 bit integers. Thanks a lot! :)

  • 0 in reply to Jimmy Wein
    Guru 74080 points

    Jimmy,

    here might be the reason:

    If you have a look into the technical reference manual on page 605, you will find the following:

    You are using TA0CCTL1, so your code line

    TA0CCTL1 = CM_1 + CCIS_1 + CAP;

    results in CCI0B when selecting CCIS_1. Now look at this table on page 91 from the datasheet:

    CCI0B is DVss. ACLK is CCI1B, so I guess if you were using TA1 instead of TA0, the internal connection to ACLK will work.

    Although it is working for you now - could you test this just for clarity?

    Dennis

    Edit: But then your setting that is working would not fit :-\ So maybe my thought isn't correct...never used the capture mode so far.

  • 0 in reply to Dennis Eichmann
    Intellectual 260 points

    Dennis,

    this was indeed the case. When looking at the technical reference I only paid attention to CCIS bits, forgetting about TA0 / TA1 selection. It now works with internal ACLK when using TA1 and not TA0.

    Setup code for internal signal:

    TA1CCTL1 |= CAP | CM_1 | CCIS_1;
TA1CTL |= TASSEL_2 | MC_2;

    Thanks to both!

  • 0 in reply to Jimmy Wein
    Guru 74080 points
    But do you have an explanation why your setting works when still using TA0? I'm a little bit confused myself now - the table from the datasheet isn't that clear to me.
  • 0 in reply to Dennis Eichmann
    Intellectual 260 points
    I actually don't know, it should only work when using TA2 according to datasheet, not TA0. Anyways, I used CCR2 and TA0 and it still worked somehow when using external ACLK.
  • 0 in reply to Jimmy Wein
    Guru 74080 points

    CCR2 is listed at P2.5 with TA0.2, so there is a relationship, but the whole table is difficult to understand (in my opinion). It is some kind of "if you use it in this way, then this...and if you use it in that way, then that...

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