MSP430 : 2 PWM Signals Generation With Fixed Delay

Not from a TI engineer, but this would be a possible implementation:

You start one timer module which controls the 1st PWM and simultaneously set a value for a compare interrupt that fires exactly after 25% of your duty cycle. In the ISR you start the 2nd PWM sourced from another timer module and disable the CCIE interrupt capability again. This interrupt only needs to be executed once.

#FreeSampleCode

#include "msp430g2553.h"

void main( void )
{
  WDTCTL   = WDTPW | WDTHOLD;                // Stop watchdog timer

  BCSCTL1  = CALBC1_1MHZ;                    // Set range to 1MHz
  DCOCTL   = CALDCO_1MHZ;                    // Set DCO step and modulation to 1MHz

  P1SEL    = 0x40;                           // Enable timer function for P1.6 (TA0.1)
  P1DIR    = 0x40;                           // Set P1.6 (TA0.1) to output direction

  P2SEL    = 0x02;                           // Enable timer function for P2.1 (TA1.1)
  P2DIR    = 0x02;                           // Set P2.1 (TA1.1) to output direction

  TA0CCR0  = 10000;                          // Period for 1st PWM: 10ms @ 1MHz
  TA0CCR1  = 2000;                           // Duty cycle for 1st PWM: 2ms @ 1MHz
  TA0CCR2  = 2500;                           // 25% of duty cycle to start 2nd PWM
  TA0CCTL1 = OUTMOD_7;                       // TA0.1 reset/set mode
  TA0CCTL2 = CCIE;                           // Compare interrupt for 25% of elapsed duty cycle
  TA0CTL   = TASSEL_2 | ID_0 | MC_1 | TACLR; // 1st PWM: SMCLK, divider 1, up-mode, clear

  TA1CCR0  = 10000;                          // Period for 2nd PWM: 10ms @ 1MHz
  TA1CCR1  = 2000;                           // Duty cycle for 2nd PWM: 2ms @ 1MHz
  TA1CCTL1 = OUTMOD_7;                       // TA1.1 reset/set mode

  __bis_SR_register( GIE );                  // Enable interrupts

  while( 1 );
}

#pragma vector = TIMER0_A1_VECTOR            // Compare interrupt for 25% elapsed duty cycle
__interrupt void TIMER0_A1_ISR( void )
{
  TA1CTL   = TASSEL_2 | ID_0 | MC_1 | TACLR; // 2nd PWM: SMCLK, divider 1, up-mode, clear
  TA0CCTL2 = 0x00;                           // Clear compare interrupt - executed only once
}

In this example, the period of both PWMs is 10ms, the duty cycle is 2ms and the 2nd PWM starts 2.5ms (25%) after the first one:

All done on the MSP-EXP430G2 LaunchPad with a MSP430G2553 microcontroller.

If your program has nothing else to do, then you can enter a low power mode, of course.

Dennis

Of course the inaccuracy of the clock source also generates an error. But this is an absolute deviation that is equal for both PWMs. If one is off by a specific time compared to a fixed 70kHz reference, then the other has the same deviation because both are sourced from the same clock source. And if one drifts, then the other does as well. The duty cycle is not affected by any drifts if you look at it as a percentage of the period. It changes according to the period drift, but 50% of the error free period will stay 50% of the period with error.