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MSP430F538a: Getting SPI interrupt every 10 usec

Helllo,

We design a new project in which the MSP430 will get an interrupt upon SPI message via USCA (as slave) every 10usec.

Upon this interrupt, the MCU will set some GPIOs and send an SPI message via USCB (as master).

Each time, the incoming SPI message has the same size.

Each time, the number of operations executed by MCU (via SPI, GPIO) is identical according to the incoming message.

My question is:

Can I be sure that the above process will be fully deterministic without any interrupt jitter ?

Best regards,

Z.V 

  • Always have a look at interrupts with higher priority that will be serviced before your SPI RX interrupt. Timer modules normally have higher priority. Let's say your program is executing one interrupt at the moment and in the background there will fire a SPI RX interrupt and a timer interrupt, then your RX interrupt is delayed even more. But only you know if this scenario can occur. Inside your RX ISR, if there is always the same code executed without any if-else or whatever possible decisions that may change execution time, the program should run eually in each cycle.
  • Hi Dennis,

    In my application only the SPI RX interrupt is enabled.
    I'm using the MCU's internal clock.

    After powerup, should I expect any changes in this clock (that will probably affect performance) ?

    Best regards,
    Z.V
  • >We design a new project in which the MSP430 will get an interrupt upon SPI message via USCA (as slave) every 10usec.
    >Upon this interrupt, the MCU will set some GPIOs and send an SPI message via USCB (as master).

    I would never design communication interface where SPI roles are swapping. Why you chose receive as slave and transmit as master approach? This introduces unnecessari complexity and what's worse - lot of overhead code.
  • Ilmars said:
    >We design a new project in which the MSP430 will get an interrupt upon SPI message via USCA (as slave) every 10usec.
    >Upon this interrupt, the MCU will set some GPIOs and send an SPI message via USCB (as master).

    I would never design communication interface where SPI roles are swapping. Why you chose receive as slave and transmit as master approach? This introduces unnecessari complexity and what's worse - lot of overhead code.

    What is the alternative I have ?

    Thank you,

    Z.V

  • Why you chose receive as slave and transmit as master approach? This introduces unnecessari complexity and what's worse - lot of overhead code.

    It's unusual when using SPI, but it's the equivalent of a (half) duplex UART. You can think of it as message passing.

  • >Why you chose receive as slave and transmit as master approach?

    Perhaps the MSP430 sits between two different SPI devices? I.E. device B in a system configured as A->B->C
  • >What is the alternative I have ?
    In case you are talking about communication between _two_ chips - use just single SPI interface between them. Master device can readout information from slave, w/o changing roles. After all SPI is bidirectional.

    Only possible reason to do what you are planning is SPI bridge Brian mentions:
    >Perhaps the MSP430 sits between two different SPI devices? I.E. device B in a system configured as A->B->C

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