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MSP430FR5969 GPIO Button interrupt

Other Parts Discussed in Thread: MSP430FR5969

I have everything set to set the P4IFG.5 and P4IFG.6 including releasing the LOCKLPM5 bit at the right time.

Problem: The flag is not set in the P4IV and interrupt is not noted when the button is pushed.

I have checked my hardware, and the two buttons are at 3.31V from the pullup in the pin on the MSP430FR5969. When the button is pushed, the value is driven to 0.0V which should signal an interrupt for my falling edge detect. 

I have the following code configuration and operation code:

CONFIGURATION:

  P4DIR &= ~(BIT7 + BIT6 + BIT5 + BIT4);   // Direction = input (0); output would be (1)
    P4DIR |=   BIT3 + BIT2 + BIT1 + BIT0;    // Set Port4 pins to output function
    P4REN |=   BIT7 + BIT6 + BIT5 + BIT4;  // Enable pull-up/pull-down resistor     // ALIGN WITH EDGE DETECT
    P4OUT |=   BIT7 + BIT6 + BIT5 + BIT4;  // Configure pull-up = 1; pull-down = 0; 1 used for high to low interrupt
    P4OUT &= ~(BIT3 + BIT2 + BIT1 + BIT0);    // Zero(0) for pull-down on N/C pins.

  // P4SEL0.x and P4SEL1.x = 00b is for I/O configuration
  // Pins P4.3 - P4.0 are output Enable pins
    P4SEL0 &= ~(BIT7 + BIT6 + BIT5 + BIT4);
    P4SEL0 &= ~(BIT3 + BIT2 + BIT1 + BIT0);   // Set to primary function (00b -- per channel)
    P4SEL1 &= ~(BIT7 + BIT6 + BIT5 + BIT4);
    P4SEL1 &= ~(BIT3 + BIT2 + BIT1 + BIT0);   // Set to primary function (00b -- per channel)

    P4IES |= BIT7 + BIT6 + BIT5 + BIT4;  // P4.7, P4.6, P4.5 and P4.4 Hi to Lo falling edge interrupt (1b) //CONFIRMED

// Lock bit is cleared:

    PM5CTL0 &= ~LOCKLPM5;

   P4IFG &= ~(BIT7 + BIT6 + BIT5 + BIT4 + BIT3 + BIT2 + BIT1 + BIT0); // Clear Port 4 Interrupt Flags

   P4IE  |= BIT7 + BIT6 + BIT5 + BIT4;  // P4.7, P4.6(B1), P4.5(B2) and P4.4 interrupts enabled

OPERATION CALL:

// Waiting for button press (code is stuck here with no IFG):

    __bis_SR_register(LPM1_bits | GIE);  // Enter LPM1 for Timer0_B7 w/interrupt
    __no_operation();                    // For debugger happiness

// Interrupt set up (never entered):

#pragma vector=PORT4_VECTOR
__interrupt void PORT4_ISR_HOOK(void)
{

    /* USER CODE START (section: PORT4_ISR_HOOK) */
    switch(__even_in_range(P4IV, P4IV_P4IFG7))
    {
        case P4IV_NONE: break;              // Vector 0: No interrupts pending;
        case P4IV_P4IFG0: break;            // Vector 2: P4IFG.0;
        case P4IV_P4IFG1: break;            // Vector 4: P4IFG.1;
        case P4IV_P4IFG2: break;            // Vector 6: P4IFG.2;
        case P4IV_P4IFG3: break;            // Vector 8: P4IFG.3;
        case P4IV_P4IFG4: break;            // Vector 10 (0xA): P4IFG.4;
        case P4IV_P4IFG5:                   // Vector 12 (0xC): P4IFG.5;
            ButtonPress = BUTTON2PRESSED;   // BUTTON2PRESSED;
            P4IFG &= ~BIT5;                 // Clear P4.5 IFG
            break;                          // end Vector 12: P4IFG.5;
        case P4IV_P4IFG6:                   // Vector 14 (0xE): P4IFG.6;
            ButtonPress = BUTTON1PRESSED;   // BUTTON1PRESSED;
            P4IFG &= ~BIT6;                 // Clear P4.6 IFG
            break;                          // end Vector 14: P4IFG.6;
        case P4IV_P4IFG7: break;            // Vector 16 (0xF): P4IFG.7;
        default: ButtonPress = 0; break;    // Default to NOBUTTONPRESSED condition
    }
    /* Exit Low Power Mode before return from interrupt */
        __bic_SR_register_on_exit(LPM1_bits | GIE);       // Exit LPM1   | GIE
    /* USER CODE END (section: PORT4_ISR_HOOK) */
}

******************************************************************************************

I can set the IFG flag with this command just before the __bis_SR_register(LPM1_bits | GIE) command:

P4IFG |= BIT5;

and the interrupt works.

QUESTION: What am I missing?

Thanks.

  • Do the outputs P4.0..3 work? Do you see changes in the bits in PIN?
  • Yes P4.0,P4.1,P4.2 P4.3 work as GPIO outputs and moving up and down as expected.

  • Are you using the LaunchPad or a custom board?
  • Do you see changes in the bits in P4IN?
  • The last part of your ISR says:
    /* Exit Low Power Mode before return from interrupt */
    __bic_SR_register_on_exit(LPM1_bits | GIE); // Exit LPM1 | GIE

    Actually, it will exit Low Power Mode and turn off GIE after return from interrupt.

    Does you main() ended with?
    __bis_SR_register(LPM1_bits | GIE); // Enter LPM1 for Timer0_B7 w/interrupt
    __no_operation(); // For debugger happiness

    If so, main() will exit (with GIE off) and do other things that you have no control of.
  • There is a resolution to this issue.

    I am using our board and the Launchpad. The configuration code is correct and complete. The code runs on the Launchpad for the MSP430FR5969. Comparing the schematics, the launchpad has a direct feed to ground through the button.

    We had a resister inline that has worked well on previous MSP430 processors.

    My conclusion is that the FR5969 GPIO pins are more sensitive with the newer technology, so substituting the resistor with the direct wire of the Launchpad, the interrupt flag was set on my board.

  • Hi Glenn,

    Glad to know that the issue is resolved now.

    From the code example; the configuration of P4DIR, P4REN and P4OUT registers indicate that the P4.5 and P4.6 GPIOs are set as input with internal pull-up resister enabled. So if there is another resistor connected in series between the GPIO and the push-button going to ground (which I assume is on your custom board from your description above), pressing on the push button will create a voltage divider between the internal pull-up resistor and the external resistor. Because of this voltage divider, the input voltage observed at the GPIO pin may fall somewhere between the logic high and logic low voltage levels (and in turn causing the interrupt to not work properly).

    So in addition to substituting the resistor with a short like you have tried, a different value of the resistor can also make things work for you as long as the voltage divider gives proper voltage to register high->low on the GPIOs.

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