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MSP-EXP430F5529LP UART Example

Other Parts Discussed in Thread: MSP-EXP430F5529LP

Hello, I'm having trouble with the MSPWare example for the MSP-EXP430F5529LP UART example.

#include <msp430.h>

int main(void)
{
  WDTCTL = WDTPW + WDTHOLD;                 // Stop WDT
  P3SEL = BIT3+BIT4;                        // P3.4,5 = USCI_A0 TXD/RXD
  UCA0CTL1 |= UCSWRST;                      // **Put state machine in reset**
  UCA0CTL1 |= UCSSEL_2;                     // SMCLK
  UCA0BR0 = 6;                              // 1MHz 9600 (see User's Guide)
  UCA0BR1 = 0;                              // 1MHz 9600
  UCA0MCTL = UCBRS_0 + UCBRF_13 + UCOS16;   // Modln UCBRSx=0, UCBRFx=0,
                                            // over sampling
  UCA0CTL1 &= ~UCSWRST;                     // **Initialize USCI state machine**
  UCA0IE |= UCRXIE;                         // Enable USCI_A0 RX interrupt

  __bis_SR_register(LPM0_bits + GIE);       // Enter LPM0, interrupts enabled
  __no_operation();                         // For debugger
}

// Echo back RXed character, confirm TX buffer is ready first
#pragma vector=USCI_A0_VECTOR
__interrupt void USCI_A0_ISR(void)
{
  switch(__even_in_range(UCA0IV,4))
  {
  case 0:break;                             // Vector 0 - no interrupt
  case 2:                                   // Vector 2 - RXIFG
    while (!(UCA0IFG&UCTXIFG));             // USCI_A0 TX buffer ready?
    UCA0TXBUF = UCA0RXBUF;                  // TX -> RXed character
    break;
  case 4:break;                             // Vector 4 - TXIFG
  default: break;
  }
}

I'm using CCS cloud, with the included terminal. I connect to the apropiate COM port at the appropiate baud rate and it does not echo. Neither does HyperTerminal work.

  • Nevermind, I solved the problem, had to use USCI_A1 instead od USCI_A0.

    #include <msp430.h>
    
    int main(void)
    {
      WDTCTL = WDTPW + WDTHOLD;                 // Stop WDT
      P4SEL = BIT5+BIT4;                        // P4.4,5 = USCI_A1 TXD/RXD
      UCA1CTL1 |= UCSWRST;                      // **Put state machine in reset**
      UCA1CTL1 |= UCSSEL_2;                     // SMCLK
      UCA1BR0 = 6;                              // 1MHz 9600 (see User's Guide)
      UCA1BR1 = 0;                              // 1MHz 9600
      UCA1MCTL = UCBRS_0 + UCBRF_13 + UCOS16;   // Modln UCBRSx=0, UCBRFx=0,
                                                // over sampling
      UCA1CTL1 &= ~UCSWRST;                     // **Initialize USCI state machine**
      UCA1IE |= UCRXIE;                         // Enable USCI_A1 RX interrupt
      
      __bis_SR_register(LPM0_bits + GIE);       // Enter LPM0, interrupts enabled
      __no_operation();                         // For debugger
    }
    
    // Echo back RXed character, confirm TX buffer is ready first
    #pragma vector=USCI_A1_VECTOR
    __interrupt void USCI_A1_ISR(void)
    {
      switch(__even_in_range(UCA1IV,4))
      {
      case 0:break;                             // Vector 0 - no interrupt
      case 2:                                   // Vector 2 - RXIFG
        while (!(UCA1IFG&UCTXIFG));             // USCI_A1 TX buffer ready?
        UCA1TXBUF = UCA1RXBUF;                  // TX -> RXed character
        break;
      case 4:break;                             // Vector 4 - TXIFG
      default: break;
      }
    }

  • Hi Fernando,

    Good catch, thanks for posting your answer.

    Best regards,

    David

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