i2c clock speed not properly set

Prakash Balagangatharan

Other Parts Discussed in Thread: MSP430F5338

Hi,

I am using msp430f5338. In this i have developed the i2c driver. My system is running at 20MHz external crystal and the same is assigned to SMCLK (is used as a source to i2c clock). I have set the baud rate as per the formula

(systemclk / baudrate) = i2c clkspeed => (20MHZ / 200) = 100 kHz.

But if i observed the SCL frequency value in logic analyzer i am getting only as 74kHz. I am not able to found the reason . To confirm whether my system is running at 20MHz i have triggered a timer interrupt for 100ms, i am getting timer interrupt for every 100ms proper from this i can confirm the clock is running at 20Mhz.

Could anyone faced such akind of issue.

Thnaks in advance.

over 10 years ago

0 Ryan Brown1 over 10 years ago

TI__Guru**** 218257 points

Hi Prakash,

Can you confirm that the UCBxCTL1 register has the UCSSELx bits set to a value of 2 or 3 and that the UCBRx value is 200 (UCxBR0 = 200 or 0xC8 & UCxBR1 = 0) and that this all happens while UCSWRST = 1? Providing your initialization code would be of great value as well.

Regards,
Ryan

0 Ryan Brown1 over 10 years ago

TI__Guru**** 218257 points

Hello Prakash,

Can you provide any updates on your issue?

Thanks,
Ryan

0 Prakash Balagangatharan over 10 years ago in reply to Ryan Brown1

Expert 2440 points

Ryan,
If i am adjusting the pull up value is 5K i can get the frequency of 90kHz still we are need to dig some more level. Is there any tolerance for SCL frequency?
Thanks

0 Ryan Brown1 over 10 years ago in reply to Prakash Balagangatharan

TI__Guru**** 218257 points

Prakash,

SCL clock frequency is up to 400 kHz, this of course depends on the USCI module clock source fBitClock. fBitClock = fBRCLK/UCBRx but the maximum bit clock that can be used in single master mode is fBRCLK/4.

Regards,
Ryan

0 Prakash Balagangatharan over 10 years ago in reply to Ryan Brown1

Expert 2440 points

Ryan,

Ryan Brown1 said:
fBitClock = fBRCLK/UCBRx

From this fBitClock = SCL clock rate,

fBRCLK = USCI clock

UCBRx = Value set in UCBRx

In my case fBRCLK is SMCLK (20MHz)

fBitClock = 100 kHz

from the formula the value to be set in UCBRx = 200. and this value is properly setting in the register. Is this correct?

0 Ryan Brown1 over 10 years ago in reply to Prakash Balagangatharan

TI__Guru**** 218257 points

Prakash,

According to the equations defined in the I2C UCSI section of the User Guide, this is correct. If you do not find this to be the case with your setup then perhaps you can attach your test code so that I can look at it and try to debug the issue from my end.

Regards,
Ryan

0 Prakash Balagangatharan over 10 years ago in reply to Ryan Brown1

Expert 2440 points

Thanks Ryan,

We are suspecting our pull up resistor value(10k) with load, if we reduced pull up resistor value we can see some improvement.

0 Ryan Brown1 over 10 years ago in reply to Prakash Balagangatharan

TI__Guru**** 218257 points

Thanks for the update Prakash, glad to know that a stronger pull-up is improving your system.

Regards,
Ryan

0 Ilmars over 10 years ago in reply to Prakash Balagangatharan

Guru 46710 points

Two cents: Error could be caused by the way you measure frequency. I2C does not have continuous clock, so it is not that easy to precisely measure it' s frequency, especially w/o proper instrument. In case you have el-cheapo logic analyzer with 24MHz sample rate, your measurements can be off by huge margin in some cases.

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i2c clock speed not properly set