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MSP430G2332 TimerA up mode interrupt

Al McBride
Intellectual 620 points

Other Parts Discussed in Thread: MSP430G2332

Fellow Developers:

I am having trouble getting my interrupt handler for TimerA in Up mode to execute.

Here is my register setup

// setup TimerA clock and Counting Up Mode
    TACTL = 0x0110;        // ACLK source + Up mode
    TACCR0 = 50;  // 50%   // 12khz ACLK divided = 83.3 microseconds period = 60 steps in 5ms
    TACCTL0 = 0x0010;      // CCIE - Interrupt Enabled

Here is my interrupt code

// Timer Interrupt Routine
#pragma optimize=none
#pragma vector=TIMER0_A0_VECTOR    // 0xFFF2   MSP430G2332
// Timer TACCRO up mode interrupt
__interrupt void Timer_A1_ISR(void)
{  
      if (TACCTL0 & 0x01) // TAR == TACCRO interrupt CCIFG
          P1OUT ^= 1; // toggle output p1.6 here for debug

} 

Any suggestions about what I am doing wrong would be most appreciated.

Al McBride

SMART Light Systems

  • 0
    Guru 58965 points
    I think the hardware automatically clears the CCIFG bit in TACCTL0 when the corresponding ISR is entered. Thus the expression in your if statement inside that ISR is always false and P!OUT BIT0 will not flip.
  • 0 in reply to old_cow_yellow
    Guru 74080 points

    Yes, I agree with OCY. The IFGs of the CCR0 events are cleared when servicing the IRQ. The others that come from CCR1, CCR2, ... and the timer overflow (TAIFG) have a shared IV. By accessing the IV, the highest pending interrupt is cleared. But in your case if( TACCTL0 & 0x01 ) will not come true because the IFG has just been cleared everytime your program reaches this statement. You can remove it and only write P1OUT ^= 1;

  • 0 in reply to old_cow_yellow
    Intellectual 620 points

    old_yellow_cow:

    Thanks for the response I appreciate it.  I have solved my problem as described below.  First I believe the interrupt flag is reset when you exit the ISR not enter it.  Also TAIV which I do not use in this case gets reset the first time it is read.

    As for my issue I forgot to setup the ACLK as being sourced from the internal VLOCLK.  Without that the ACLK source is an external crystal which I do not have in my hardware and thus no ACLK was incrementing the TAR register.  Adding the above and things work fine now. 

    Again Thanks for the dialogue.  Describing the problem to another developer often times causes me to rethink the situation and find the problem.

     

    Regards

    Al McBride

    SMART Light Systems

  • 0 in reply to Al McBride
    Guru 58965 points

    Al McBride said:
    First I believe the interrupt flag is reset when you exit the ISR not enter it. 

    The interrupt flag that cause this interrupt, CCIFG in TACCTL0, is cleared when its corresponding ISR is entered.

    Al McBride said:
    Also TAIV which I do not use in this case gets reset the first time it is read.

    The TAIV has nothing to do with this interrupt. In this case, TAIV is always 0 whether you read it of not.

    , what do you think?

  • 0 in reply to old_cow_yellow
    Guru 74080 points

    Hi Al and OCY!

    old_cow_yellow said:
    , what do you think?

    The same!

    Al McBride said:
    First I believe the interrupt flag is reset when you exit the ISR not enter it.

    Al McBride said:
    Also TAIV which I do not use in this case gets reset the first time it is read.

    old_cow_yellow said:
    The TAIV has nothing to do with this interrupt. In this case, TAIV is always 0 whether you read it or not.

    if( response_comes_from_the_wise_old_cow_yellow )
{
  answer = TRUE;
}
else
{
  double_check_answer();
}

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