ADC_12 reference selection in Repeat-sequence-of-channels mode

Eric Tian61

Hi all,

I am using ADC12 module of MSP430F5529LP, when I try to use internal 2.5V as the reference in Repeat-sequence-of-channels mode, it seems that the conversion results are wrong,the input voltage is about 1.6V but the MEMx registers always read as 0x0FFF, the result in Single-channel single-conversion mode is right though, anyone can help?

P.S which reference is more accurate? AVCC or internal reference?

Following codes are modified on MSP430F55xx_adc_06.c

#include <msp430.h>
#include <stdio.h>
#include <string.h>

#define REF_AVCC (float)3.3
#define REF_2_5 (float)2.5
#define Num_of_Results 8

volatile unsigned int A0results[Num_of_Results];
volatile unsigned int A1results[Num_of_Results];
volatile unsigned int A2results[Num_of_Results];
volatile unsigned int A3results[Num_of_Results];

float result[4];

int main(void)
{
WDTCTL = WDTPW+WDTHOLD; // Stop watchdog timer
P6SEL = 0x0F; // Enable A/D channel inputs
ADC12CTL0 = ADC12ON+ADC12MSC+ADC12SHT0_8+ADC12REFON+ADC12REF2_5V; // Turn on ADC12, extend sampling time
// to avoid overflow of results
ADC12CTL1 = ADC12SHP+ADC12CONSEQ_3; // Use sampling timer, repeated sequence
ADC12MCTL0 = ADC12INCH_0+ADC12SREF_1; // ref+=VREF+, channel = A0 +ADC12SREF_1
ADC12MCTL1 = ADC12INCH_1+ADC12SREF_1; // ref+=VREF+, channel = A1 +ADC12SREF_1
ADC12MCTL2 = ADC12INCH_2+ADC12SREF_1; // ref+=VREF+, channel = A2
ADC12MCTL3 = ADC12INCH_3+ADC12SREF_1+ADC12EOS; // ref+=VREF+, channel = A3, end seq.
ADC12IE = 0x08; // Enable ADC12IFG.3
ADC12CTL0 |= ADC12ENC; // Enable conversions
ADC12CTL0 |= ADC12SC; // Start convn - software trigger

__bis_SR_register(LPM0_bits + GIE); // Enter LPM0, Enable interrupts
__no_operation(); // For debugger

}

#if defined(__TI_COMPILER_VERSION__) || defined(__IAR_SYSTEMS_ICC__)
#pragma vector=ADC12_VECTOR
__interrupt void ADC12ISR (void)
#elif defined(__GNUC__)
void __attribute__ ((interrupt(ADC12_VECTOR))) ADC12ISR (void)
#else
#error Compiler not supported!
#endif
{
static unsigned int index = 0;

switch(__even_in_range(ADC12IV,34))
{
case 0: break; // Vector 0: No interrupt
case 2: break; // Vector 2: ADC overflow
case 4: break; // Vector 4: ADC timing overflow
case 6: break; // Vector 6: ADC12IFG0
case 8: break; // Vector 8: ADC12IFG1
case 10: break; // Vector 10: ADC12IFG2
case 12: // Vector 12: ADC12IFG3
A0results[index] = ADC12MEM0; // Move A0 results, IFG is cleared
A1results[index] = ADC12MEM1; // Move A1 results, IFG is cleared
A2results[index] = ADC12MEM2; // Move A2 results, IFG is cleared
A3results[index] = ADC12MEM3; // Move A3 results, IFG is cleared

result[0]=A0results[index]*REF_2_5/4095;
result[1]=A1results[index]*REF_2_5/4095;
result[2]=A2results[index]*REF_2_5/4095;
result[3]=A3results[index]*REF_2_5/4095;
printf("P6.0=%f V\n",result[0]);
printf("P6.1=%f V\n",result[1]);
printf("P6.2=%f V\n",result[2]);
printf("P6.3=%f V\n",result[3]);

index++; // Increment results index, modulo; Set Breakpoint1 here
if (index == 8)
{
(index = 0);
}
case 14: break; // Vector 14: ADC12IFG4
case 16: break; // Vector 16: ADC12IFG5
case 18: break; // Vector 18: ADC12IFG6
case 20: break; // Vector 20: ADC12IFG7
case 22: break; // Vector 22: ADC12IFG8
case 24: break; // Vector 24: ADC12IFG9
case 26: break; // Vector 26: ADC12IFG10
case 28: break; // Vector 28: ADC12IFG11
case 30: break; // Vector 30: ADC12IFG12
case 32: break; // Vector 32: ADC12IFG13
case 34: break; // Vector 34: ADC12IFG14
default: break;
}
}