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Multiple GPIO interrupt whilst DMA is active?

Tom Davies58
Intellectual 275 points

We are using a GPIO interrupt to count a number of pulses into a given input on our device, if DMA is active whilst we receive one pulse I understand the interrupt will queue up ready for when DMA has finished and all is well.

What happens if we get multiple pulses on the input whilst DMA is active? Will the ISR only be queued once for the duration of the DMA, effectively missing the pulses?

Our DMA is set up in repeated single transfer byte mode.

  • 0
    Guru 58965 points
    I think multiple IRQs from different pins will still be queued. But multiple IRQs from the same pin will have only one remain in the queue. because there is only one IFG bit per pin.

    The same thing may happen with or without DMA. Repeated DMA, prolonged ISR, as well as no GIE can all increase the probability of this problem.
  • 0 in reply to old_cow_yellow
    Intellectual 275 points
    I figured as much but couldn't work out from the datasheets whether this was the case or not.

    I fixed the issue, thankfully not due to DMA utilisation but because we had turned off a particular interrupt on the wrong variant of our hardware, whoops :)

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