Hello all,
I am working with an MSP430F5310, with the core running at 25 MHz using DCO. I do not have any external crystals on my system. I am trying to run my SPI (UCB1) at 8 Mhz, however the problem is that 25 Mhz is not divisible by 8 Mhz. This means that I can't tell the UCB1 peripheral to use a scaler to derive its clock, since using 3 gives me 8.33 Mhz, and using 4 gives me 6.25. Can anyone give me any insight on how I can set my SPI clock speed to 8 Mhz while keeping my core frequency at 25 MHz?
This is how I set my core to 25 MHz (comes from a TI example):
void setClocks()
{
// Increase Vcore setting to level3 to support fsystem=25MHz
// NOTE: Change core voltage one level at a time..
SetVcoreUp (0x01);
SetVcoreUp (0x02);
SetVcoreUp (0x03);
UCSCTL3 = SELREF_2; // Set DCO FLL reference = REFO
UCSCTL4 |= SELA_2; // Set ACLK = REFO
__bis_SR_register(SCG0); // Disable the FLL control loop
UCSCTL0 = 0x0000; // Set lowest possible DCOx, MODx
UCSCTL1 = DCORSEL_7; // Select DCO range 50MHz operation
UCSCTL2 = FLLD_1 + 762; // Set DCO Multiplier for 25MHz
// (N + 1) * FLLRef = Fdco
// (762 + 1) * 32768 = 25MHz
// Set FLL Div = fDCOCLK/2
__bic_SR_register(SCG0); // Enable the FLL control loop
// Worst-case settling time for the DCO when the DCO range bits have been
// changed is n x 32 x 32 x f_MCLK / f_FLL_reference. See UCS chapter in 5xx
// UG for optimization.
// 32 x 32 x 25 MHz / 32,768 Hz ~ 780k MCLK cycles for DCO to settle
__delay_cycles(782000);
// Loop until XT1 & DCO stabilizes - In this case only DCO has to stabilize
do
{
//UCSCTL7 &= ~(XT1LFOFFG + XT1HFOFFG + DCOFFG);
UCSCTL7 &= ~(XT1LFOFFG + DCOFFG);
// Clear XT1,DCO fault flags
SFRIFG1 &= ~OFIFG; // Clear fault flags
}while (SFRIFG1&OFIFG); // Test oscillator fault flag
}
