Jump Table

Inside a string constant, macros are not expanded. String constants are takes 'as is'. This is the defined behaviour of the C preprocessor.

The 'asm' intrinsic just forwards the attached string constant  'as is' to the assembler stage, right where it is. The string can contain anything, the compiler won't complain (but the assembler will :) )

Under mspgcc compiler, the ASM intrinsic has been expanded with three parameter fields:

asm ("asm instruction":out:in:clobber);

This feeds a miniature preprocessor that does macro replacement inside the string. e.g. %0 is replaced by the first parameter in the out or in field. But beyond that, the compiler will determine the type of data and generate the proper prefix (#, & etc.), will generate required code to provide the value in a requested form (e.g. write into a stack memory location or load it into a register if the instruction requires it there) and will also notice that certain registers are clobbered by the instruction and therefore the generated C code around this instruction cannot rely on their content anymore (for registers which are changed but not in the in/out fields, there is the clobber field)

So on mspgcc your instruction would read
__asm__ __volatile__ ("move %0, PC"::"i"(APP_ISR_VECTOR_START_ADDR +RESERVED0_VECTOR):PC);
telling the compiler to not optimize the code (__volatile__), replace the placeholder %0 with the first parameter found in the out/in list (which is an immediate value with the value APP_ISR... and that the PC is changed during this instruction.

Anyway, I'd do it differently:

MOV  VECTOR_OFFSET, R15
MOV  VECTOR_TABLE_START_ADDRESS(R15),PC

This allows the vector offset being passed as parameter (on mspgcc, the first parameter is always passed on R15, so the first MOV had to be be dropped) But it depends on what you axactly want to do.

Hi,

Thanks for you time and response

I am using

asm("mov %0, PC"::"i"(APP_ISR_VECTOR_START_ADDR +RESERVED0_VECTOR):PC);

but it gives compile time error [ expected a ")"]

One more thing we had done assembly on Microship and we had used syntax like:

asm("goto %0"::"i"(APP_ISR_VECTOR_START_ADDR +RESERVED0_VECTOR));

It's work over there.

You're right, the MSPGCC does not accept PC, SP or SR for register names. Use R0, R1 and R2 instead.
Adding ':R0' at the end tells the compiler that R0 is changed by the instruction. I'm not sure whether this makes any difference. I think, the compiler will only care about R4..R15 as these are data registers. I just added it for completeness.
This inline syntax is GCC specific (also for other GCC based MCU  compilers). IAR and CCE don't use it.

You cannot compare microchips assembly syntax with the MSP. Things are completely different there. 'goto' may be a valit assembly instruction on a PIC, but I doubt (though I bever tried)  that it will work for MSP.

However, the orthographic RISC  instruction set knows many assembly instructions which result in the same binary opcode: the 'BR x' instruction is actually assembled as 'MOV x,R0'. Therefore indirect jumps and even indeirect indexed jumps ar epossible (the MOV instruction knows these addressing modes)
The 'JMP x' instruction, however, might appear as an 'add(a) #x, R0' but isn't, as the offset is 10 bit only (insted of 16/20 bit) and part of hte generated opcode itself (so it is a one-word instruction). Even the 'POP x' instruction is actually a 'MOV @SP+, x" instruction. (I wonder why 'RET' isn't emulated the same way, as it is just a 'POP R0', at least the 54xx users guide does not list it as emulated, RETA, however, is.).