MSP432 I2C DMA transfer issue

/*
 * -------------------------------------------
 *    MSP432 DriverLib - v2_20_00_08 
 * -------------------------------------------
 *
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/*******************************************************************************
 * MSP432 DMA - eUSCI I2C Transfer Using DMA to Arrdvark
 *
 * Description: In this code example, the MSP432 's DMA controller is used in 
 * conjunction with an I2C loopback configuration to demonstrate how to use
 * hardware triggered DMA transfers. Two DMA transfers are setup using two 
 * different channels. Channel 2 is used for the DMA transfer and Channel 5 is
 * used for the DMA receive. Once the transfers are setup and initialized, the
 * device is put to sleep. While sleeping, the DMA controller will automatically
 * transfer the data from the const array and out through the uESCI B1 I2C
 * module as a master. The slave, which is setup on eUSCI B2, will automatically
 * trigger the DMA controller to place the incoming data in a RAM buffer called
 * recBuffer. When the DMA transfer is complete, an interrupt will be fired and
 * the master will send a stop condition out over the I2C Line.
 *
 * This program runs infinitely until manually halted by the user.
 *
 *                MSP432P401
 *             ------------------
 *         /|\|                  | <10k Pull-Up> 
 *          | |                  |   | |
 *          --|RST    P1.6 (SDA) |---|---------------SDA Arrdvark
 *            |       P1.7 (SCL) |-------------------SCL Arrdvark
 *            |                  |
 *            |       P3.6 (SCL) |
 *            |       P3.7 (SCL) |
 *            |                  |
 *
 * Author: Timothy Logan
 ******************************************************************************/
/* DriverLib Includes */
#include "driverlib.h"

/* Standard Includes */
#include <stdint.h>

#include <string.h>
#include <stdbool.h>

/* Statics */
static uint8_t recBuffer[1024];
static volatile bool sendStopCondition;

/* I2C Configuration Parameter */
const eUSCI_I2C_MasterConfig i2cMasterConf =
{
        EUSCI_B_I2C_CLOCKSOURCE_SMCLK,          // SMCLK Clock Source
        3000000,                                // SMCLK = 3MHz
        EUSCI_B_I2C_SET_DATA_RATE_100KBPS,      // Desired I2C Clock of 100khz
        0,                                      // No Auto Stop
        EUSCI_B_I2C_NO_AUTO_STOP                // No Auto Stop
};

/* DMA Control Table */
#ifdef ewarm
#pragma data_alignment=256
#else
#pragma DATA_ALIGN(controlTable, 256)
#endif
uint8_t controlTable[256];

/* Extern */
extern uint8_t data_array[];
void read_from_slave(unsigned char addr, void *destAddress, int transferSize);
void send_to_slave(unsigned char addr, void *srcAddress, int transferSize);

// dma to aardwark works using this B0 module only.
#define EUSCI_BX_MODULE     EUSCI_B0_MODULE

#define DMA_CHX_EUSCIBXTX   DMA_CH0_EUSCIB0TX0
#define DMA_CHX_EUSCIBXRX   DMA_CH1_EUSCIB0RX0

#define DMA_CHANNEL_TX      0
#define DMA_CHANNEL_RX      1

#define DMA_INTTX           DMA_INT1
#define DMA_INTRX           DMA_INT2

void loop(void) {
    while(1)
    {
        if(sendStopCondition)
        {
            break;
        }
        MAP_PCM_gotoLPM0InterruptSafe();
    }
}

int main(void)
{
    /* Halting Watchdog */
    MAP_WDT_A_holdTimer();

    /* Initializing I2C Master on EUSCIB1  at 400Khz */
    MAP_GPIO_setAsPeripheralModuleFunctionInputPin(GPIO_PORT_P1,
            GPIO_PIN6 + GPIO_PIN7, GPIO_PRIMARY_MODULE_FUNCTION);
    MAP_I2C_initMaster(EUSCI_BX_MODULE, &i2cMasterConf);

    MAP_I2C_enableModule(EUSCI_BX_MODULE);

    /* Configuring DMA module */
    MAP_DMA_enableModule();
    MAP_DMA_setControlBase(controlTable);

    /* Assigning Channel 0 and 1 */
    MAP_DMA_assignChannel(DMA_CHX_EUSCIBXTX);
    MAP_DMA_assignChannel(DMA_CHX_EUSCIBXRX);

     /* Disabling channel attributes */
    MAP_DMA_disableChannelAttribute(DMA_CHX_EUSCIBXTX,
                                     UDMA_ATTR_ALTSELECT | UDMA_ATTR_USEBURST |
                                     UDMA_ATTR_HIGH_PRIORITY |
                                     UDMA_ATTR_REQMASK);
    MAP_DMA_disableChannelAttribute(DMA_CHX_EUSCIBXRX,
                                     UDMA_ATTR_ALTSELECT | UDMA_ATTR_USEBURST |
                                     UDMA_ATTR_HIGH_PRIORITY |
                                     UDMA_ATTR_REQMASK);

    /* Setting Control Indexes */
    MAP_DMA_setChannelControl(UDMA_PRI_SELECT | DMA_CHX_EUSCIBXTX,
            UDMA_SIZE_8 | UDMA_SRC_INC_8 | UDMA_DST_INC_NONE | UDMA_ARB_1);
    MAP_DMA_setChannelControl(UDMA_PRI_SELECT | DMA_CHX_EUSCIBXRX,
            UDMA_SIZE_8 | UDMA_SRC_INC_8 | UDMA_DST_INC_NONE | UDMA_ARB_1);

    /* Assigning/Enabling Interrupts */
    MAP_DMA_assignInterrupt(DMA_INTTX, DMA_CHANNEL_TX);
    MAP_DMA_assignInterrupt(DMA_INTRX, DMA_CHANNEL_RX);

    /* Enabling master interrupts */
    MAP_Interrupt_enableMaster();

    int i, j;
//  for (i = 0; i < 5; i ++) {
//      sendStopCondition = false;
//      MAP_Interrupt_enableSleepOnIsrExit();
//      send_to_slave(0x48, data_array, 1024);
//      loop ();
//      // sleep
////        for(j = 0; j < 100000; j ++);
//  }

//  for(j = 0; j < 500000; j ++);

    sendStopCondition = false;
    for (i = 0; i < 5; i ++) {
        sendStopCondition = false;
        MAP_Interrupt_enableSleepOnIsrExit();
        read_from_slave(0x48, recBuffer, 16);
        loop ();
        // sleep
        for(j = 0; j < 100000; j ++);
    }
}

void send_to_slave(unsigned char addr, void *srcAddress, int transferSize)
{
    // set slave address
    MAP_I2C_setSlaveAddress(EUSCI_BX_MODULE, addr);
    // set mode to transmit
    MAP_I2C_setMode(EUSCI_BX_MODULE, EUSCI_B_I2C_TRANSMIT_MODE);

    // tx channel configuration
    MAP_DMA_setChannelTransfer(UDMA_PRI_SELECT | DMA_CHX_EUSCIBXTX,
            UDMA_MODE_BASIC, srcAddress,
            (void*) MAP_I2C_getTransmitBufferAddressForDMA(EUSCI_BX_MODULE), transferSize);

    MAP_DMA_setChannelControl(UDMA_PRI_SELECT | DMA_CHX_EUSCIBXTX,
            UDMA_SIZE_8 | UDMA_SRC_INC_8 | UDMA_DST_INC_NONE | UDMA_ARB_1);

    /* Disabling the completion interrupt and disabling the DMA channels */
    MAP_DMA_disableChannel(DMA_CHANNEL_TX);

    // as per DMA12, disable interrupt first
    MAP_DMA_disableInterrupt(DMA_INTTX);

    /* Clear flag */
    MAP_DMA_clearInterruptFlag(DMA_CHANNEL_TX);

    /* Sending the start condition */
    MAP_I2C_masterSendStart(EUSCI_BX_MODULE);
    while(!MAP_I2C_masterIsStartSent(EUSCI_BX_MODULE));

    // as per DMA12, enable interrupt at the end
    MAP_DMA_enableChannel(DMA_CHANNEL_TX);

    // as per DMA12, enable interrupt at the end
    MAP_DMA_enableInterrupt(DMA_INTTX);
    MAP_Interrupt_enableInterrupt(DMA_INTTX);
}

void read_from_slave(unsigned char addr, void *destAddress, int transferSize)
{
    // set slave address
    MAP_I2C_setSlaveAddress(EUSCI_BX_MODULE, addr);
    /* Set in receive mode */
    MAP_I2C_setMode(EUSCI_BX_MODULE, EUSCI_B_I2C_RECEIVE_MODE);

    // rx channel
    MAP_DMA_setChannelTransfer(UDMA_PRI_SELECT | DMA_CHX_EUSCIBXRX,
            UDMA_MODE_BASIC, (void*)MAP_I2C_getReceiveBufferAddressForDMA(EUSCI_BX_MODULE),
            destAddress, transferSize);

    /* Disabling the completion interrupt and disabling the DMA channels */
    MAP_DMA_disableChannel(DMA_CHANNEL_RX);

    // as per DMA12, disable interrupt first
    MAP_DMA_disableInterrupt(DMA_INTRX);

    /* Clear flag */
    MAP_DMA_clearInterruptFlag(DMA_CHANNEL_RX);

    // Sending the receive
    MAP_I2C_masterReceiveStart(EUSCI_BX_MODULE);
    // do i need this?
//  while(!MAP_I2C_masterIsStartSent(EUSCI_BX_MODULE));

    /* Now that the DMA is primed and setup, enabling the channels. The EUSCI
     * hardware should take over and transfer/receive all bytes */
    // as per DMA12, enable interrupt at the end
    MAP_DMA_enableChannel(DMA_CHANNEL_RX);

    // as per DMA12, enable interrupt at the end
    MAP_DMA_enableInterrupt(DMA_INTRX);
    MAP_Interrupt_enableInterrupt(DMA_INTRX);
}

static int euscib1_isr_count = 0;
void euscib1_isr(void)
{
    euscib1_isr_count ++;
}

static int euscib2_isr_count = 0;
void euscib2_isr(void)
{
    euscib2_isr_count ++;
}

/* Completion interrupt for eUSCIB1 RX */
void dma_2_interrupt(void)
{
    /* Disabling the completion interrupt and disabling the DMA channels */
    MAP_DMA_disableChannel(DMA_CHANNEL_RX);

    // as per DMA12, disable interrupt first
    MAP_DMA_disableInterrupt(DMA_INTRX);

    /* Clear flag */
    MAP_DMA_clearInterruptFlag(DMA_CHANNEL_RX);

    MAP_I2C_masterReceiveMultiByteStop(EUSCI_BX_MODULE);
//    while(!MAP_I2C_masterIsStopSent(EUSCI_BX_MODULE));

    sendStopCondition = true;
}

/* Completion interrupt for eUSCIB1 TX */
void dma_1_interrupt(void)
{
    /* Disabling the completion interrupt and disabling the DMA channels */
    MAP_DMA_disableChannel(DMA_CHANNEL_TX);

    // as per DMA12, disable interrupt first
    MAP_DMA_disableInterrupt(DMA_INTTX);

    /* Clear flag */
    MAP_DMA_clearInterruptFlag(DMA_CHANNEL_TX);

    MAP_I2C_masterSendMultiByteStop(EUSCI_BX_MODULE);
    while(!MAP_I2C_masterIsStopSent(EUSCI_BX_MODULE));

    sendStopCondition = true;
}

/* Completion interrupt for eUSCIB1 TX */
void dma_err_interrupt(void)
{
    sendStopCondition = true;
}