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MSP430F5515 Unused USB Pins?

When designing for low power, are there any special terminations / connections I need to make with respect to the USB pins if I'm not using the USB hardware (i.e. V18, VUSB, VBUS, PU_1/DM, PUR, PU_0/DP, VSSU)? It's not addressed in the unused pin section of the manual, so I'm currently just leaving them open... also do I have to do anything in software to disable this section of the chip, or are the default register settings in a disabled state?

Regards,

Vic

  • Hi,

    Here are the recommended connections for the USB pins when the USB module is not used (it will be added to the unused pin section soon):

    V18, PUR, Vusb, PU.1/DM, PU.0/DP -> No Connect

    Vbus, VSSU -> GND

    Regards,

    Bhargavi

  • Hi Bhargavi,

    While we are talking about unused port pins, what is your recommendation about the JTAG pins, which are now under user control on the 5xxx parts? I noticed some traffic on the yahoo forums about this recently, and I don't think anyone really has a concrete answer at this point. I figured it best to hear the official TI opinion. An excerpt of the post is below.

    Thanks

    darkwzrd

     

    > What is the best configuration to use to initialize the PJx & TEST (jtag port pins) when initializing the MSP430 (in this case 5437, 5418, 5438) to insure stability and minimum power??

    > The docs imply that the pins are forced to enable the internal pullup "when" the FET programmer is connected and programming is active.

    >
    > What happens at other times?
    >
    > Should the internal resistors be enabled at all times?
    >
    > As pull UP or pull DOWN's??
    >
    > OR should the ports be forced to the Digital OUT HI condition recommended for all other unused ports? In which case, does the JTAG "TEST" pin force an over-ride condition, allowing the pins to be used as inputs for programming?
    >
    > How should the TEST pin be handled?
    >

     


  • I am currently having issues establishing a JTAG connection to the MSP430 using the FET & code composer. See related post:

    http://e2e.ti.com/support/microcontrollers/msp43016-bit_ultra-low_power_mcus/f/166/p/64214/231272.aspx#231272

    After reading your post I'm concerned that some unconnected pin or some other connection might be preventing the JTAG communications.

    We are using the 5514 and we are not using the USB functionality. No external crystal or oscilator.

    Is there any "no connect" pins or something similar, that can prevent JTAG communcations?

    Did you ever receive any recommendations for the JTAG pins?

    What are the implications of not having the Vbus, VSSU connected to ground?

     

  • The F5514 devices come with USB BSL by default and on reset, the device enters BSL mode if sufficient voltage on Vbus is present and if PUR pin status is detected as a high. In this case, if the VBUS and PUR are left floating, it is possible that the device is entering BSL mode. Could you tie these pins to GND and check if the JTAG communication works? Also, make sure to tie VSSU pin to VSS of the device.

    Find below the link to the wiki document that discusses the configuration of un-used USB pins.

    http://processors.wiki.ti.com/index.php/Migrating_from_MSP430_USB_Devices_to_its_Non-USB_Variants

    Regards,

    Bhargavi

     

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