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Can't write in ISR vector table in run-time

Other Parts Discussed in Thread: MSP430F5529

I need to edit the ISR vector table [ 0xFFD2, 0xFFE ] in run-time by a program I wrote.

I have been able to write in the RAM with no problems but I can't do it in those addresses, (1) can somebody tell me why ? Also, (2) how do I solve it ?

I copied the mem_cpy function to my program and that's the one I am using.

void * memory_copy(void *to, const void *from, unsigned short n) {
	register char *rto = (char *) to;
	register char *rfrom = (char *) from;
	register unsigned short rn;

	for (rn = 0; rn < n; rn++)
		*rto++ = *rfrom++;
	return (to);
}

I checked the address and it doesn't belong to flash memory since it's placed on [ 0x4400, 0xFF80 ].

Thank you.

  • The interrupt vector table is in flash. Why do you think it's not?

    Some MSP families allow to remap the interrupt vector table to the top of SRAM.

  • Is it ?

    I checked the [lnk_msp430f5529.cmd] file and the flash was set as follows :

    MEMORY
    {
        [...]
        FLASH                   : origin = 0x4400, length = 0xBB80
        FLASH2                  : origin = 0x10000,length = 0x14400
    }

    While the interrupts are :

    MEMORY
    {
        INT00                   : origin = 0xFF80, length = 0x0002
        INT01                   : origin = 0xFF82, length = 0x0002
        [...]
    }

    If I do the math, 0x4400 + 0xBB80 = 0xFF80, so the interrupts are supposed to be located after the flash. Isn't this correct ?

    In that case, I guess there is a way to write in flash, is there any documentation about it ?

    Thank you.

  • >0xFF80, so the interrupts are supposed to be located after the flash

    Yes it's located after code/const Flash-segment, but it's still Flash.

    Flash block can be erased and reprogrammed in code.

    Some msp430 allows you to point to ram after you set some bits.

    But all this is not for beginners so I would leave it alone, why do you need to change it?

  • I need to have control of the interrupts for my program.

    What other way would you recommend ? Would remapping the vector table be viable ?

    Thank you.
  • >need to have control of the interrupts
    What does that mean?

    A ISR is a: void function (void)  with the special __interrupt in front if it so compiler will use reti instead of ret
    and so it also knows that is needs to handle bic_on_exit stuff.

    Above the function put (for example):
    #pragma vector=TIMER0_A0_VECTOR

    This will tell compiler to put this functions address in to the vector table, the vector table will now be part of the source/hex code.

    Only time you need to change vector table is if you have a new custom firmware section and ISR functions addresses changed,
    But that involves turning off all IRQ while you erase the upper 512bytes and take a chance that nothing goes wrong
    before you wrote the new table back. Putting a second shadow version in RAM is safer for those msp's that allows it.

  • Jon Zarate said:
    I need to have control of the interrupts for my program.

    What other way would you recommend ? Would remapping the vector table be viable ?

    Thank you.

    In assembler, I am using dedicated register (changeable on-the-fly) as pointer to selected interrupt subroutine. For example, timer interrupt is enabled after function address is stored in R15 ...

    TimerInt     br R15     

            org 0FFEAh    ; Timer
            dw TimerInt

  • I need to have control of the interrupts for my program.

    Your program always has control of the interrupts.

    To change what an interrupt handler does, you can put the logic into the handler function:

    void my_interrupt(void)
    {
        if (something) {
            // this
        } else {
            // that
        }
    }
    What other way would you recommend ? Would remapping the vector table be viable ?

    If your MCU has the SYSRIVECT bit, this might be possible. But it would require you to be able to modify the linker script to move the stack out of the way.

  •  

    Jon Zarate said:
    I need to have control of the interrupts for my program.

    I meant, the values of the interrupt vector table. I must be able to change them in runtime, that's why I propossed the remapping of it to the RAM, since my board belongs in x5xx family, I think it's possible to accomplish.

    I know how to set interrupts in C code, what I need to do is set the values of the interrupt vector table in runtime.

    Regarding the stack, why do I have to move it ? If I recall correctly, it is located in offsets [0x4360, 0x4400).

    Hope it's clear now. Thanks.

  • Jon Zarate said:
    I meant, the values of the interrupt vector table. I must be able to change them in runtime, that's why I propossed the remapping of it to the RAM, since my board belongs in x5xx family, I think it's possible to accomplish.

    I think the question that people are trying to get at is "why do you need to change the vector table at runtime?"

    Are you writing a bootloader that writes a new firmware into flash and then runs it? That's the main reason to change the vector table entries at runtime.

  • Robert Cowsill said:
    Are you writing a bootloader

    Kinda, yes.

    Robert Cowsill said:
    that writes a new firmware into flash and then runs it?

    Nope.

    I am developing a Loader that will read a raw ELF file from the flash and load it. The ELF file is relocatable and I perform the relocations in runtime too. I load the code in RAM and execute it. However, if the ELF file I am loading uses interrupts, I need to set them. That's why I need to change values of the interrupt vector table.

    Possible solutions I came up with:

    1) Edit flash in run time
    2) Move the interrupt vector table

  • My CDC BSL is executing from RAM and don't use any interrupts (doesn't have any interrupt vector table). After erasing, new firmware is stored in main flash. Don't know if this is somehow related to your loader.
  • ELF files are Executable Linkable Format which consists of a symbol look-ups and relocatable table, that is, it can be loaded at any memory address by the kernel and automatically, all symbols used, are adjusted to the offset from that memory address where it was loaded into.


    You could set up a indirect address jump table, just below the vector flash location as this will work with any msp.
    At a fixed RAM location you set up a secondary vector table, that you can change on demand.

    Result is something like this:

    0xfd00 BR 0x200 ; jmp to the address stored at ram 0x200
    0xfd02 BR 0x202
    0xfd04 BR 0x204

    Sure it wastes 3 cycles for the IRQ to go through every time.

  • Since the original question has been answered I will create another post with the new question.

    Thanks.

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