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MSP430F5510 ESD causing RST/NMI reset.

Luis Filipe Rossi1
Prodigy 250 points
Other Parts Discussed in Thread: MSP430F5510, TPD4S014

Hello, 

I have a product with an MSP430F5510. Battery powered, 4 layers with solid ground, small board (3x4cm). Covered by plastic and a stainless steel plate with only exposed terminals are the USB pins. We are protecting the USB pins with TPD4S014.  When we were using 2.2nF capacitors on the RST line the device was very sensitive, reseting with RST/NMI cause several times and sometimes just hanging. We changed the capacitor for 1uF and that helped a lot, but we are still not complete confident. Currently the TEST pin is floating (internal pull-down driving it). 

Few questions. Is the 1uF too high for the RST pin? Is there any better capacitance to reduce the noise sensitivity? Maybe a stronger pull-up? Would adding a stronger pull-down to the TEST line improve the immunity? Have seen several posts with problems with ESD on the TEST line that was solved by a stronger pull-down. The only way to cause a RST/NMI reset is by the RST line or the TEST pin have any effect on that?

Regards

  • 0
    Guru 46710 points

    Luis Filipe Rossi1 said:
    Maybe a stronger pull-up? Would adding a stronger pull-down to the TEST line improve the immunity?

    Maybe. You shall try it. While testing EMI/ESD, you shall analyze current paths. Could be so that problem lies in completely another place than you think, for example LDO. BTW where, into which part of the circuit do you apply ESD hit when reset occur? Decoupling capacitors in all places where needed close to chip(s)?

  • 0 in reply to Ilmars
    Prodigy 250 points
    The ESD is applied at the USB pins (only part of the circuit that is exposed. Yea, using decoupling capacitors where possible and the 3V rail (the one that power the circuit) is one solid layer. The LDO "far" from the USB line and it has several capacitors and a ferrite bead between the TPD4S014 ans the LDO. Also I believe the TPD4S014 should block the ESD with the over-voltage protection circuit.

    Finally, something that i noticed with the PCB with 1uF capacitor (do not have one with 2.2nF in hands) is that the RST line is wtih 2.9V and not 3.0V as I was expecting (the circuit is powered with 3V). Any reason for that? Doesn't that mean that the RST pull-up is toooo weak?
  • 0 in reply to Luis Filipe Rossi1
    Mastermind 9115 points
    Maybe you can post the PCBA and housing assembly figure so that we can help to examine the possible ESD path.

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