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MSP430F149; SMCLK and uart clock

Other Parts Discussed in Thread: MSP430F149

Hello,

I would like to use the MSP430F149 uart at 115200 baud rate.

So I need to use SMCLK to reach this baud rate and did not succeed to find the correct register values.

For uart: according to slau049.pdf, U1BR0 = 0x09; U1BR1 = 0x00; and U1MCTL = 0x08;

But I am stuck to program the SMCLK to 1048576 Hz, which value should I use for DCOCTL and BCSCTL1 please?

I tried DCOCTL = 0x20 and BCSCTL1 = 0x84 (BCSCTL2=0) but it does not work, my PC is not able to recognize the uart data.

 

Is there any CALDCO_1MHZ equivalent for MSP430F149 when I use IAR?

 

BR

Michel

  • The CALDCO settings are no compiler-specific things. These are references to a memory location inside the MSP where TI has stored the device-specific calibraiton settings after testing each separate device.

    The 1x series does not have this kind of calibration data and the 5x series does not have it anymore as it has a hardware-calibrated 32khz clock and an FLL instead which is quite es good as teh calibration data but works for any destination frequency.

    There is no way to 'know' the actual workign frequency of an 1.x MSP. On my own 1611 based MSP projects (and the older1232 based projects) I used an external 8MHz quartz crystal and did have an (more or less) exact SMCLK of 1MHz.

    Anyway, if you know the exact MSCLK frequency, you can calculate the required divider and modulation settings with a formula tthat is somewhere in the users guide.

    Here's a code snippet that did its job for the 1611 with any baudrate up to 115200 Bd.

      unsigned int divider;
      long threshold, rest, fraction=0, smclock = SMCLK;
     unsigned char i, mod=0;
      smclock = 1048576L; // the real SMCLK frequency, device specific
    // calculate main clock divider
      divider= smclock / baudrate;
    // calculate bitclock modulation byte
      threshold=baudrate/2;
      rest= smclock - (baudrate * (unsigned long)divider);
      for(i=0;i<8;i++){
        fraction+=rest;
        mod>>=1;
        if(fraction>threshold) {mod|=128; fraction-=baudrate;}
      }

            U0CTL  = SWRST;                            // reset UART
            U0CTL |= CHAR;                             // 8-bit character
            U0TCTL = SSEL_SMCLK;                     // UCLK = SMCLK
            U0BR0 = (unsigned char)(divider>>0);
            U0BR1 = (unsigned char)(divider>>8);
            U0MCTL = mod;                              // calculated bit clock modulation
            U0ME |= UTXE0 | URXE0;                     // Enabled USART0 TXD/RXD
            U0CTL &= ~SWRST;                           // Initalize USART state machine
            U0IE |= URXIE0;                            // enable interrupts
            U0IE |= UTXIE0;

    For your SMCLK value, the settings are 0x09/0x00 for U0BRx and U0MCTL = 0x10.
    Or in your case, change U0 to U1 everywhere.

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