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How to disable timer interrupt when going to LPM4

Other Parts Discussed in Thread: MSP430F5529

Hi,

I have TimerA0 interrupt firing few times per second. When user hits a key I want to go to LPM4 mode. But the problem is my timer interrupt does not stop, it keeps running.

I am using MSP430F5529 and I am using XT2 as my clock source and SMLK to run the timer. I read the datasheet and LPM4 SHOULD turn SMLK off, but why doesn't my timer stop then? Am I missing a step here?

Thanks

Mario

  • That's not exactly true.

    LMP4 set the SCG0, SCG1, OSCOFF and CPUOFF bits.
    SCG0 will disable the FLL
    SCG1 disables DCO if DCO is not used to drive SMCLK or MCLK.
    OSCOFF will disable LFXT1 if LFXT1CLK is not required for MCLK or SMCLK
    CPUOFF will disable MCLK.

    So SMCLK remains active as long as required by any module such as the timer.
    To really enter LPM4, you'll need to either disable all modules using SMCLK or you'll have to forbid them to conditionally request a clock, so they are only clocked if their clock source is already enabled. Use the SMCLKREQEN bit in USCSTL8 for this purpose. If these REQEN bits are set (and they are at a BOR, but not after a PUC) , every active module which requires SMCLK or ACLK will override the LMP mode settings and keep the clock active.

    Some modules like ADC and FLASH can unconditionally requiest a clock. You cannot prevent them from keeping the clock active unless you set the modules inactive.

    Keep in mind that you'll need an ISR to wake up from LPM again. If you have a port interrupt for this, fine.

     

  • You are right, I missed that when I read the datasheet. It seems to be working now.

    Thanks

  • I just tried using ACLK as my clock source for Timer and I cleared ACLKREQEN bit and my timer interrupt doesn't work. When I did the same thing with SMCLKREQEN my timer interrupt fired fine.

    Any idea why that would be?

    Thanks

  • What is your ACLK setup?
    If ACLK is sourced by LFX1CLK and the crystal is diabled or not there, ACLK will automatically switch to REFO as oscillator source. REFO, however, is diabled in LPM4, so ACLK may be requested and still active but sourced with 0Hz during LPM4.

    This should be independent of the ACLKREQEN bit.

  • MY ACLK is sourced by XT2. I don't think ACLKREQEN bit should affect it.

  • In a different thread about migrating from 54xx to 54xxA, someone discovered that on teh A-versions LPM4 will disable XT2 while on the non-A versions XT2 is not disabled.

    Maybe this happens for you too. Can you try to feed an external clock signal to XT2IN and check whether the problem persists? (it's difficult to check whether a crystal is running - any probe will most likely stop it)

  • I didn't try that but maybe I should once I get my timer issue resolved.

    I am finally back on trying to solve this problem again. Here is my setup. I am using XT2 to source my ACLK. I use ACLK for my timer. My timer interrupt fires OK when ACLKREQEN bit is left in it's default state, which is 1.

    Once I clear ACLKREQEN my timer interrupt stops firing even when I am not going into LPM.

    This is what msp430f55xx family guide states:

    When ACLKREQEN or MCLKREQEN bits are cleared, or disabled, the clock is always halted as defined by the low power modes.

    I am NOT going into low power mode so timer should not be stopped. I ran out of things to look at. I wonder if it's something small that I am missing here related to ACLKREQEN bit. Anyone had this problem?

    Thanks

  • If ACLKREQEN is clear, the ACLK will only be active if anyone is making an UNconditional request. Conditional requests are blocked and if no request remains, the ACLK will be halted, even outside any LPM. It's not explicitely written in the docs, but that's what I interpret in it by your observations and some other statements in the docs.
    And it's logical: why having a clock active that isn't used?

    If you have the clock availbale in normal mode bu tnot in LPM, then you should clear ACLKREQEN directly before entering LPM, and set it again when exiting LPM (do it inside the ISR (along with clearing the LPM bits) or some instructions later, but don't set the bit in the instruction immediately following the line entering LPM.

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