hi
i tried using timerb interrupt with ACLK and continuous mode
i am not able to generate interrupt for 200ms
i cannot identify the issue
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hi
i tried using timerb interrupt with ACLK and continuous mode
i am not able to generate interrupt for 200ms
i cannot identify the issue
int main(void)
{
WDTCTL = WDTPW + WDTHOLD; // Stop WDT
P1DIR |= 0x07; // P1.0,1,2 output
P5DIR |= 0x40; // P5.6 output
P5SEL |= 0x40; // P5.6 ACLK out
DCOCTL = DCO0 + DCO1 + DCO2; //DCO-7
BCSCTL1 = XT2OFF + RSEL0 + RSEL1 + RSEL2; //Rsel -7
BCSCTL2 = 0x00;
__delay_cycles(200);
TBCCTL0 = CCIE; // CCR0 interrupt enabled
TBCCTL1 = CCIE; // CCR1 interrupt enabled
TBCCR0 = 0x52; // for 5ms
TBCCR1 = 0x148; // for 200ms
TBCTL = TBSSEL_1 + MC_2 + ID_1; // ACLK, contmode, Clock/2
__bis_SR_register(GIE); // Enter LPM0 w/ interrupt
while(1);
}
// Timer B0 interrupt service routine
#if defined(__TI_COMPILER_VERSION__) || defined(__IAR_SYSTEMS_ICC__)
#pragma vector=TIMERB0_VECTOR
__interrupt void Timer_B (void)
#elif defined(__GNUC__)
void __attribute__ ((interrupt(TIMERB0_VECTOR))) Timer_B (void)
#else
#error Compiler not supported!
#endif
{
P1OUT ^= 0x01; // Toggle P1.0
TBCCR0 += 0x52; // Add Offset to CCR0
TBCCTL0 &= ~CCIFG;
//TBIV &= ~0x02;
}
// Timer B1 interrupt service routine
#if defined(__TI_COMPILER_VERSION__) || defined(__IAR_SYSTEMS_ICC__)
#pragma vector=TIMERB1_VECTOR
__interrupt void Timer_B1 (void)
#elif defined(__GNUC__)
void __attribute__ ((interrupt(TIMERB1_VECTOR))) Timer_B (void)
#else
#error Compiler not supported!
#endif
{
switch( TBIV )
{
case 2:
TBCCR1 += 0x148; // Add Offset to CCR1
P1OUT ^= 0x02; // Toggle P1.1
TBCCTL1 &= ~CCIFG;
break;
default: break;
}
}
i tried all the 8 interrupts
i am toggling a port pin in the ISR
i tried for lower range but for higher range it does not work
Then you should use "run to line" or set a breakpoint inside the ISR to see if it is called at all. Furthermore you could disable the other interrupt and see if that makes a difference.
when i debug the code, i have a break point in the ISR. It never comes into the ISR
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