Timer A

Hari

Other Parts Discussed in Thread: MSP430F1611

Can anyone tell me what is capture or compare in TimerA and its use?

Below a sample program is given

I dont know why 32768 is Added as an offset to CCR1in the ISR.. can anybody explain the reason?

#include "include/include.h"
#include "include/hardware.h"
int main ( void )
{
    WDTCTL = WDTPW + WDTHOLD; // Stop WDT
    P5DIR |= 0x70; // P5.4, P5.5, P5.6 in output mode
    CCTL0 = CCIE; // CCR0 interrupt enabled
    CCTL1 = CCIE; // CCR1 interrupt enabled
    CCTL2 = CCIE; // CCR2 interrupt enabled
    CCR0 = 0;
    CCR1 = 0;
    CCR2 = 0;
    TACTL = TASSEL_1 + MC_2+ TAIE; // ACLK, contmode, TAIE enabled
    _BIS_SR(LPM0_bits + GIE); // Enable the global interrupt and enter LPM0
}
// Timer_A TACCR0 interrupt vector handler
interrupt (TIMERA0_VECTOR) TimerA0_procedure ( void ){
    P5OUT ^= 0x10; //on TACCR0 Toggle P5.4 (Red LED)
    CCR0 += 16384; // Add offset to CCR0
}
// Timer_A TAIV interrupt vector handler
interrupt (TIMERA1_VECTOR) TimerA1_procedure ( void ){
    switch( TAIV )
    {
        case 2: P5OUT ^= 0x20; // on TACCR1 CCIFG Toggle P5.5 (Green LED)
            CCR1 += 32768; // Add offset to CCR1
            break;
        case 10: P5OUT ^= 0x40; // on Timer overflow TAIFG Toggle P5.6 (Blue LED)
            break;
    }
}

over 15 years ago

0 old_cow_yellow over 15 years ago

Guru 58965 points

There is an entire chapter in the User's Guide devoted to TimerA. There are also books and notes.

As for adding 32768, it is chosen so that the green LED will flash at twice the rate of the blue LED and half the rate of the red LED.

This is because 32768 is half of 65536 (which is 2^16) and twice of 16384.

0 Jens-Michael Gross over 15 years ago

Guru 227245 points

Hari said:
Can anyone tell me what is capture or compare in TimerA and its use?

Actually it's not TimerA, it's also TimerB (with extended functionality like synchroinizing the channels) and it's no use, they're uses. Several. So it's a complex topic.

Basically, 'capture' means that the current value of the timer is captured when an external event occurs (e.g. a level change on a port pin). The current value of TAC when this event occurred is captured into the CCRx register associated with this event and an IRQ is triggered.

'compare', however, means that the manually written value of CCRx is compared to TAR and if they match, an interrupt is triggered and one of several possible actions is done. Like inverting, setting or clearing a port pin. Additionally, another action can be taken if TAR counts to zero. So you can set the port pin at TAR=0 and clear it at TAR=CCRx or similar.

A special case is CCR0, which can be used in compare mode to not only toggle a por tpin, but also to influence the timer itself. So CCR0 can define the upper limit for TAR after which TAR will start counting from 0 again (up mode) or downwards again abck to 0 (up/down mode).

This is required for hardware PWM where you define the PWM frequency with CCR0 and the duty cycle of the outputs with the other CCRs.

Also, since CCR0 interrupt has its own, independent interrupt vector, you can use it to implement a system tick. Let TimerA run in continuous mode and set CCR0 to , say, 1000. If TAR reaches 1000, an IRQ is triggered. In its ISR, you increment CCR0 by 1000 (=2000), then increment a global variable (tick counter) or switch threads or whatever. When TAR reaches 2000, the next IRQ comes, no matter how long you took to finish your work. Next one is at 3000. You'll get equidistant IRQs. Even if a different ISR was active in the moment when TAR reached 1000, you'll get the next IRQ exactly at TAR=2000. And if you happen to miss some IRQ because IRQs were blocked for a longer time, you can detect it (TAR-CCR0 > 1000) and do the intended job twice, eventually catching up again.
Since you don't need to set the timer at a frequency of [65536*desired interrupt frequency] to get a timer overflow IRQ, you can can easily get alsmost any interrupt frequency from any timer clock frequency. Not just the few ones selectable by the clock divider.

In your example, a mixture of the above is used. TimerA is set to a frequency where an overflow appears at TAR=65535 (continuous mode), defining the blue LED frequency f_blue= TAClock/65536/2 (/2 because the LEDs are toggled, requiring 2 overflows for one on/off cycle)
CCR0 and CCR1 are set to trigger an interrupt at f_green= f_blue/2 and f_red= f_blue/4 by cyclic setting CCR1 to 32768 and 0 (= 32768+32768) and CCR0 to 16384,32768,49152 and 0.

So if TAR reaches the initial CCR0 value (0), the CCR0 ISR will toggle the LED and add 16384 to CCR0. At TAR=16384, the LED is toggled again and CCR0 is set to 32768 and so on.

Surprisingly, CCR2 is configured as well, but there is no ISR for it. (it should be case 4 in the switch statement). So ignore the code lines with CCR2= and CCTL2=.

0 rishap_77 over 15 years ago in reply to Jens-Michael Gross

Prodigy 50 points

Hi,

Could someone please tell me about the OUTx pins for Timer-A and how to use them in different modes to generate PWM output.? I'm working with an MSP430F1611.

Thanks,

Rishab

0 Jens-Michael Gross over 15 years ago in reply to rishap_77

Guru 227245 points

Rishab Padukone said:
Could someone please tell me about the OUTx pins for Timer-A and how to use them in different modes to generate PWM output.? I'm working with an MSP430F1611.

Did you read the users guide? At least the first part of your question is covered there. And the second part is just the logical consequence of the OUT bit usage.

From the users guide:

OUTMOD Bits 7-5 Output mode. Modes 2, 3, 6, and 7 are not useful for TAxCCR0 because EQUx = EQU0.

000 OUT bit value
001 Set
010 Toggle/reset
011 Set/reset
100 Toggle
101 Reset
110 Toggle/set
111 Reset/set

This table tells what happens to the OUT bit if TAR counts to CCRx or counts to CCR0.
For PWM, you'll set up CCR0 to reset TAR after a given number of timer ticks. So you generate the PWM frequency.

Let's say CCR0 is 999. For 1MHz TACLK (up mode), this lets TAR count from 0 to 999, then start again from 0. It gives 1kHz PWM frequency.

Then you define the duty cycle. Let's say 10%.

You'll set CCTL1 to outmode 7 (111, reset/set) and CCR1 to 99 ( ((CCR0+1)*duty_cycle)-1). What happens?
If TAR counts to CCR0, the OUT bit is set. Next tick, TAR counts to 0 and starts counting up again. when it reaches CCR1, the OUT pin is reset. So the OUT bit is on for 100 ticks and off for 900. 10% duty cycle.

Special care is required for 0% and 100%. In these cases it is better to switch outmode to 1 (set = 100%) or 5 (reset = 0%). You cannot get at least one of these two cases just by altering CCR1, as the formula above will give CCR1=CCR0 or CCR1=-1, which won't work properly, as -1 (for 0%) would result in 100% (CCR1 is never reached to reset the pin) and CCR1=CCR0 (for 100%) results in a race condition as the bit is set and reset at the same time. For inverted signals, use set/reset mode instead of reset/set mode. Or invert the value you're writing into CCR1.

For PWM on OUT2 pin, use CCR2 instead. If you have more CCR channels (TimerB7 has CCR0 to CCR6), you can have several PWM signals with the same frequency but different and completely independent duty cycles. And by using two timers, you can generate superimposed cycles (one timer defining active/inactive duty cycle, the other one generating pulses during the active phase). We had such an application in the last days here in the forum.

0 msp430_rocks over 15 years ago in reply to Jens-Michael Gross

Prodigy 10 points

In addition to the previous excellent post, also keep in mind that the TimerA module itself can be placed in different modes (documented in the User's Guide) by setting the MC bits in the TACTL (Timer A Control Register):

MCx Bits [5-4]: Mode control. Setting MCx = 00h when Timer_A is not in use conserves power.

00 Stop mode: the timer is halted.
01 Up mode: the timer counts up to TACCR0.
10 Continuous mode: the timer counts up to 0FFFFh.
11 Up/down mode: the timer counts up to TACCR0 then down to 0000h.

This gives the ability to define the PWM edges in several different ways.

0 rishap_77 over 15 years ago in reply to msp430_rocks

Prodigy 50 points

thanks Jens-Michael Gross and msp430_rocks

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