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MSP430FR5869

Other Parts Discussed in Thread: MSP430FR5869

Team,

I used the MSP430FR5869. I find ACCTEIFG was set in my code. I have checked the system clock, it did not exceed 8 MHz. I want to know

  • there is any other condition can triger this bit besides the FRAM access time is violated
  • How the CPU know if the real access time have exceed 8M? it monitor the configuration or monitor real clock?

Thank you

Victor

  • Hi Victor,

    Do you ever modify the value of FRCTL0 inside of your firmware? What are you attempting to set your system frequency to? Is the ACCTEIFG set if NWAITSx = 1? Does this behavior exist outside of the debugger? Can it be easily cleared by writing a 0 to it or will it be re-asserted immediately afterward? This flag should only be set from the combination of a wrong NWAITS setting and violation of FRAM access. The ACCTEIFG bit does not trigger a PUC or change the SYSRSTIV register value. The device generates wait states to make sure that the system clock for the CPU does not exceed the FRAM access and cycle time requirements.

    Regards,
    Ryan
  • Hi Victor,

    please also consider ERRATA CS12 for possible DCO overshoots. See link below:

    www.ti.com/.../slaz473

    Best regards,
    Dietmar

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