This is part of an example code: msp430fr69xx_ta0_01.c given at TI Explorer. I did not understand how this sum will affect the counter and interrupts since the interrupt service will be called after TAxR completes FFFFh number os countings.
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This is part of an example code: msp430fr69xx_ta0_01.c given at TI Explorer. I did not understand how this sum will affect the counter and interrupts since the interrupt service will be called after TAxR completes FFFFh number os countings.
The sixteen bit CCR register can hold values from 0 to 65535. If the register is currently loaded with let's say 50000 and you add another 50000 to it, you would have 100000, but the register cannot hold this number, so it rolls over. There are 15535 left to 65535, then 1 to roll over to 0 again and then your final value in the register is 34464. In this way you can always add a fixed amount of ticks. The timer running in continuous mode will count from 0 to 65535, roll over to zero and again count up to 65535 and so on. The interrupt fires when the timer hits CCR. So by adding a fixed amount to CCR you add a fixed time that will elapse until the timer again hits the value.
Dennis
1) The TAIFG (TIMER0_A1) interrupt fires when TAR rolls over. The CCR0:CCIFG (TIMER0_A0) interrupt fires when TAR==CCR0.
2) Two separate functions: The CCR0 interrupt always fires when TAR==CCR0. If running in Up mode, it also resets TAR.
3) but the difference between these values is always 50000 clocks, which gives a fixed span between (CCR0) interrupts.
Doing this allows using the timer for multiple things. If you need Continuous mode for other reasons, this technique provides a semblance of the Up mode behavior.
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