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MSP430G2553 PCB (Standalone) Requirements

Other Parts Discussed in Thread: MSP430G2553

Hello:

For a project I am working on recently, I ran into some issues with my PCB that uses an MSP430. Naturally, I looked to issues with the traces and the software. However, one facet of my PCB design that I was  was the requirements for the MSP430G2553 to operate on its own. By this, how to use the MSP430G2553 after it has been programmed on the Launchpad and then placed into a DIP socket onto a PCB.

In general, what general requirements would a standalone MSP430G2553 (operating on a PCB) need? Do I need to hold certain pins high or ______ (etc.) or certain resistors on each pin?

Thank You,

Quest Jelinek

  • IIRC, there isn't much needed except for the resistor and capacitor on the reset pin. As a reference, please see the schematic of the MSP430G2 Launchpad for the configuration and component values for the resistor and capacitor.

  • I would also add a 10µ + 100n  across DVcc and DVss.

  • On devices with SBW, the capacitor at the reset pin is limited to 2.2nF (including wire and trace capacitance). This is because the reset pin is also a clock pin for the SBW singal (some MHz).
    If VCC can be slowly rising, this isn't enough to keep the MSP in reset while VCC is still rising. To us a larger capacitor (for a larger Tau), put 100nF (or even more) to VSS and 10K to VCC, but put an additional 1k resistor between the two and the RST pin. This is sufficient to separate the high-frequency SBW signal from the large capacitor while still providing a long low-level during VCC rise.

    If the part has a separate AVCC/AVSS, a separate 10µ Tantalum/100nF ceramic combo is recommended between the two, while separating AVCC from DVCC by a 10-100Ohms resistor, and routing AVSS separately form DVSS to the supply GND point. Internally, the analog and digital supply voltages may differ by up to 0.2V, so the separate GND trace will be free of current-induced digital gnd ripples while the R/C filter eliminates ripples on the DVCC-DVSS voltage. THis gives way better analog results.
    If the analog circuitry isn't used, then AVCC/AVSS shoudl be connected to DVCC/DVSS directly.

    For DVCC, an electrolytic capacitor of 10 or 47µF is sufficient (doesn't need to be tantalum). And a 100nF ceramic one.

    And on 5x family devices and newer, a separate external 470nF capacitor (ideally a good ceramic one, for lowest losses) to GND must be added (for the internal core voltage regulator). See the data sheet.
  • Jens-Michael Gross said:

    If VCC can be slowly rising, this isn't enough to keep the MSP in reset while VCC is still rising.

    Thanks Jens-Michael Gross, You could explain to me that it means that 'If VCC can be slowly rising, this isn't enough to keep the MSP in reset while VCC is still rising'

  • FranMartin said:
    You could explain to me that it means that 'If VCC can be slowly rising, this isn't enough to keep the MSP in reset while VCC is still rising'

    The MSP is a low-power device. For this reason, the brownout detection can't use a bandgap reference. As a result, the trigger level is not too precise (see data sheet).

    Now it must be ensured that it is low enough to not hold the device in reset at minimum operating voltage. As a result, it will release the device on a voltage below the minimum operating voltage. At this point, the CPU would start operating while minimum operating voltage isn't reached, causing device malfunction. Now the brownout detection adds a small delay before releasing the device from reset. Usually, this is enough, so that VCC has further risen to and above minimum operation voltage before the CPU starts. But if voltage is rising very slowly (in terms of milliseconds), this delay might not be enough. This may happen for switching supplies or if a large buffer capacitance is present and the PCB traces are small. Adding anothe rdelay by an RC combo on the reset pin extends this time, as the voltage on the reset pin will then lagging behind VCC as long as VCC is still rising, keeping the reset pin on logic low independently of the brownout circuitry.

    As an alternative, you can use a switching supply with 'power good' signal (using it as reset signal) or an external precision voltage supervisor. But both alternatives add constant power consumption and cost, while the RC combo, once charged, won't consume more than the reset pin input current (50nA typ.) and capacitor leakage.

  • Thank you for your detailed explanation. You have given me my doubt.

    Best regards,

    Fran.
  • Hello Jens-Michel,

    Jens-Michael Gross said:
    On devices with SBW, the capacitor at the reset pin is limited to 2.2nF (including wire and trace capacitance). This is because the reset pin is also a clock pin for the SBW singal (some MHz).
    If VCC can be slowly rising, this isn't enough to keep the MSP in reset while VCC is still rising. To us a larger capacitor (for a larger Tau), put 100nF (or even more) to VSS and 10K to VCC, but put an additional 1k resistor between the two and the RST pin. This is sufficient to separate the high-frequency SBW signal from the large capacitor while still providing a long low-level during VCC rise.

    Is this the circuit that separates the high frequency sbw signal from the capacitor? Thanks in advance.

    Best regards,
    Fran Martin.

  • Yes, looks okay. Be sure to attach the SBW wire directly to the RSTSBW pin :)

    At 8MHz (I think this is the SBW frequency), the 100nF capacitance would give an effective impedance of 0.2 Ohm (the 2.2nF would be ~10Ohm, still not much), so it would short the SBW signal to GND without this 1k resistor.

    You might want to attach the RST switch directly to the portpin. This increases discharge time a bit (but this doesn't matter for a manual reset) but ensures you can reset the MSP even if the SBW interface forces the pin high. Sometimes requered during development. :)

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