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MSP430F5249 PMM Errata items

Hi,

This is related question to below E2E thread.

http://e2e.ti.com/support/microcontrollers/msp430/f/166/p/552537/2049773#2049773

My customer is planning to use F5249 and fast wakeup from LPM is mandatory for their system.
Because there are many PMM errata(PMM9, PMM11, PMM12, PMM14, PMM15, PMM18 and PMM20), LPM2/3/4 cannot be used with fast wakeup.
So customer is planning to use LPM0/1 instead.

Questions:
1) As far as I understood from Errata description, only PMM9 and PMM14 affect to LPM0/1.
And PMM9/14 have software workaround.

PMM9: SVSx must be turned on in normal mode, then switch to full-performance mode
PMM11: Affects to exit from LPM3/4 only.
PMM12: Affects to exit from LPM3/4 only.
PMM14: When core level is increased, SVS/SVM low side needs to switch in normal mode, then switch back to full-performance mode.
PMM15: Affects to exist from LPM2/3/4 only.
PMM18: Affects to LPM2/3/4 entry only.
PMM20: Affects to exit from LPM2/3/4 only.

Am I correct ?
Are there any undocumented known issue related to LPM0/1 ? Or Errata description is missed to LPM0/1 ?

Thanks and regards,
KoT

  • Hello KoT,

    It seems you have everything correct here. Other than the addition of PMM15 to the errata document update next quarter, I do not know of any additional PMM errata or issue of using LPM0/1 for this chip.

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