Setup:
MSP432P401R Launchpad Rev 2.0 (release red)
CCS Version: 6.2.0.00050
Driverlib version:
MSP432ware (IDE Client) 3.50.0.02 com.ti.mcu.msp432ware.product.ui.feature.group Texas Instruments Inc.
MSP432ware (Target Content) 3.50.0.02 com.ti.mcu.msp432ware.product_3.50.0.02.feature.group Texas Instruments Inc.
Synopsis:
- Configure EUSCI_A3_BASE as slave
- Load the code into MSP432 via Debug Framework & start it , send external SPI master request (whatever you want): result – EUSCIA3_IRQHandler(void) is called (can be seen by printf statements)
- Stop external master, stop MSP432
- Repeat step 2 and 3:
Load the code into MSP432 via Debug Framework & start it , send external SPI master request (whatever you want): result – EUSCIA3_IRQHandler(void) does not react
anymore (no printf statements)
The same procedure has been tested with EUSCI_B3_BASE as slave, it works fine, that means behavior of step 1 to 4 is as expected: EUSCIB3_IRQHandler is always called.
Please check if you are able to reproduce behavior.
Used code snippets (please use your own main function):
const eUSCI_SPI_SlaveConfig slaveConfig = { EUSCI_A_SPI_MSB_FIRST, EUSCI_A_SPI_PHASE_DATA_CAPTURED_ONFIRST_CHANGED_ON_NEXT, // phase select: CPHA=0 EUSCI_A_SPI_CLOCKPOLARITY_INACTIVITY_LOW, // clock polarity: CPOL=0 EUSCI_A_SPI_4PIN_UCxSTE_ACTIVE_LOW // 4wire mode, LOW active }; #define SLAVE_BASE_PORT GPIO_PORT_P9 #define SLAVE_BASE_PINS GPIO_PIN4 | GPIO_PIN5 | GPIO_PIN6 | GPIO_PIN7 #define SLAVE_BASE EUSCI_A3_BASE #define SLAVE_BASE_RECEIVE_INTERRUPT EUSCI_A_SPI_RECEIVE_INTERRUPT #define SLAVE_BASE_CONTROLLER INT_EUSCIA3 /* const eUSCI_SPI_SlaveConfig slaveConfig = { EUSCI_B_SPI_MSB_FIRST, EUSCI_B_SPI_PHASE_DATA_CAPTURED_ONFIRST_CHANGED_ON_NEXT, // phase select: CPHA=0 EUSCI_B_SPI_CLOCKPOLARITY_INACTIVITY_LOW, // clock polarity: CPOL=0 EUSCI_B_SPI_4PIN_UCxSTE_ACTIVE_LOW // 4wire mode, LOW active }; #define SLAVE_BASE_PORT GPIO_PORT_P10 #define SLAVE_BASE_PINS GPIO_PIN0 | GPIO_PIN1 | GPIO_PIN2 | GPIO_PIN3 #define SLAVE_BASE EUSCI_B3_BASE #define SLAVE_BASE_RECEIVE_INTERRUPT EUSCI_B_SPI_RECEIVE_INTERRUPT #define SLAVE_BASE_CONTROLLER INT_EUSCIB3 */ /*--------------------------------------------------------------------------------------------- */ int8_t openSlaveSPI(void) { // configure GPIO Pins MAP_GPIO_setAsPeripheralModuleFunctionInputPin( SLAVE_BASE_PORT, SLAVE_BASE_PINS, GPIO_PRIMARY_MODULE_FUNCTION ); // Configuring SPI module 'SLAVE_BASE' as Slave if( MAP_SPI_initSlave(SLAVE_BASE, &slaveConfig ) !=true ) { errorCode= ERROR_SPI_initSlave; return FUNC_ERROR; } ; // Enables the SPI module MAP_SPI_enableModule(SLAVE_BASE); // Enables individual SPI interrupt sources MAP_SPI_enableInterrupt( SLAVE_BASE, SLAVE_BASE_RECEIVE_INTERRUPT); // Enables specified interrupt in the interrupt controller MAP_Interrupt_enableInterrupt(SLAVE_BASE_CONTROLLER); // Enables processor interrupt MAP_Interrupt_enableMaster(); // EUSCI_A_SPI_clearInterruptFlag(SLAVE_BASE , EUSCI_A_SPI_RECEIVE_INTERRUPT); return FUNC_OK; } /*--------------------------------------------------------------------------------------------- */ void EUSCIB3_IRQHandler(void) { uint_fast8_t status ; status = MAP_SPI_getEnabledInterruptStatus(SLAVE_BASE ); printf("\n -----MAP_SPI_getEnabledInterruptStatus=%i---------------", status); fflush(stdout); MAP_SPI_clearInterruptFlag(SLAVE_BASE , status); return; } /*--------------------------------------------------------------------------------------------- */ void EUSCIA3_IRQHandler(void) { uint_fast8_t status ; status = MAP_SPI_getEnabledInterruptStatus(SLAVE_BASE ); printf("\n -----MAP_SPI_getEnabledInterruptStatus=%i---------------", status); fflush(stdout); MAP_SPI_clearInterruptFlag(SLAVE_BASE , status); return; }