Other Parts Discussed in Thread: MSPBSL
Hi all,
I have to do some modificatios in the USB-BSL code concerning the usb XT2 clock for a MSP430F5528.
I tried to use the example sources (MSPBSL_CustomBSL430 1_00_12_00) with my IAR EWB430 compiler V 6.30.3.
All attemps fails with linking, generating code that does not fit into the given BSL area. (MSP430F552x_USB - example out of the box)
"Error[e104]: Failed to fit all segments into specified ranges. Problem discovered in segment CODE. Unable to place 46 block(s) (0x790 byte(s) total) in 0x726 byte(s) of memory. The problem occurred while processing the segment placement command "-P(CODE)CODE,CODE_ID=1008-17EF", where at the moment of placement the available memory ranges were "CODE:10ca-17ef"
README file shows :
Change Log:
------------------------------------------------
9/21/2015
- M. Groening -
Example projects updated to build with IAR Embedded Workbench 6.30.3
USB stack for BSL updated to 1.12 (USB PI 0x09)
Even with commenting out the clock selection part code is to large.
Anyone here with same problems or even a solutions?
Best Regards,
Christian