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ADC12 input sampling noise with no channel switching

Wayne Sierke
Prodigy 50 points
Part Number: MSP430F247


Hi,

I am seeing noise spikes on an a/d input where a block of 16 samples is being made on a single channel. (This application uses a single a/d input so no channel switching is needed.)

The input is sampled at 7.5us intervals. The input is derived via a resistive network. The source impedance into the a/d input is around 4k.

This appears to be sampling noise at the commencement of each adc12 conversion. The noise was verified as being a/d conversion noise by holding the MSP430 in reset and observing that the noise is only present when the micro is running.

The input signal is a 50Hz sine and normally there is very little change in the input signal between successive sampling points. I was expecting that the sample/hold capacitor would retain nearly its full charge between samples and would only require a very small charge transfer for each successive sample. However I am seeing spikes of up to 250mV or more. This is leading to me to wonder whether there is something about the way the adc12 is currently being used that could be improved. Curiously the noise, while largely consistent, also features some random characteristics. As well as varying in amplitude it occasionally can not be seen at all.

Is "sampling" noise on a/d inputs expected on successive conversions on the same input channel? So far I have only found references to channel switching noise.

This code was previously used with an MSP430F1xx, so perhaps there is something new required in managing the ADC12 on the MSP430F2xx that has been missed?

Thanks.

  • 0
    Guru 46710 points

    This is expected behavior of msp430 SAR ADC (input). It does not have built-in input buffer amplifier and it's sample&hold capacitor is part of charge distribution capacitive SAR ADC itself. During conversion this "virtual s&h capacitor" is disconnected from input and it's charge changes during conversion, this will cause spike in the input at the next sampling phase. One option is to add RC antialiasing filter to input so  capacitor can act as low impedance voltage source. Other option is to add unity gain buffer (opamp). Further reading: users guide, "Sample Timing Considerations" chapter.

  • 0 in reply to Ilmars
    Prodigy 50 points
    Ah, I see. I had not picked up on the significance of the ADC being described as "charge redistribution" type, and that the S&H was not the typical S&H as would be used with a R-network type SAR. Thanks for your reply.

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