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MSP430F5659: gets locked in LPM3, is it an errata?

Part Number: MSP430F5659
Other Parts Discussed in Thread: MSP430F6659, MSP430F5342

Hello everyone,

Working with a new device that uses MSP430F5659 we ran into a problem: in some cases the microcontroller won't wake from LPM3. After going through errata we couldn't find anything that explains this except that it's similar to PMM15. We narrowed to it being that a timer IFG turned true during the ISR for the same timer and after exiting the ISR and going back to LPM3 it didn't reenter the ISR. We solved this by manually clearing and setting the IFG when required. This is error number 1, which I can no longer be sure of because of what's happening now.

Which brings me to error 2. The current code freezes in a way that will no longer service any ISR, nor DMA and does not even reset with the Watchdog.

While testing we found a case where it will get stuck in LPM3. The code has ISRs for 2 timers, both from TB0 at 32kHz, once the timer is set the ISRs set the next timeout band alternate between the timers (one carries ma period, the other shorter operation timeouts). In parallel the main code runs other operations that will yield control to the ISRs. At some point the ISR will return and when it re-enters LPM3 it will not wake up. We tried using a DMA, other interrupts and a Watchdog and nothing works when it gets in this state.

What seems to make the problem go away, is turning off the SVS. We use only SVSH, with SVSL and both SVM off. Also changing from automatic (Full performance/Normal) to manual seems to do the trick too.

The error is extremely code dependent, so we assume timing is important. We are working to reduce the code to something we can upload, but it will take at least another couple days.

Has anyone ran into an error like this?

  • I found this post that seems relevant...
    e2e.ti.com/.../304147
    But it did not get answered
  • Agustin,
    I might have to try to replicate this, do you have code you can share?
    Also, are you seeing this behavior in debug, in freerun, or both?
  • Hello,

    Sorry for the delay but it was holidays here.

    We are working on isolating the issue from our code so it's easier to look at (we have a complex device with many peripherals). I'll try to upload it today.

    It happens in all cases but debug. My guess is the switching to LPM3 is necessary for it to happen.

    When we change the SVSH mode it stops happening, at least in our setup.

  • What did you change the SVSH mode to?
  • We use SVSH in automatic, full performance/normal.
    When we change to manual it works fine.
    I'd like to correct that the Watchdog seems to work, we probably had an error during those tests. Interrupts are not serviced though.
    It's taking longer to simplify the code, changes to the code make the error disappear... so we ,have to go back and introduce other changes each time.

    Regards
  • Hello

    Hopefully I attached a IAR 6.50.1 project that generates at least a particular case of the error.

    It looks a lot like a new condition for PMM15. We are still working to find more information.

    Please let me know if you can reproduce the error.

    Regards

    The code consists of a main.c, events.c and timer.h

    main.c

    The main(void):

    performs some initialization (InitPeripherals();) and sets SVSH in automatic, Full/Normal

    enables an interrupt for a 32khz timer  (TB0CCTL_bit[TB0_PERIOD].CCIE = true;) - this interrupt will happen every 30.5us as it is reset in the ISR in events.c

    then goes into the for(;;) loop where:

    sets Watchdog

    sets a timer with the SMCLK (TA0CCR[TA0_GEN] = TA0R + i;) with a variable duration (depends on i)

    waits for the timer 

    goes to LPM3 tracing the time in this mode on P5.7, the interrupt on background should wake it up

    Test MSP430F5659 20170307 1300.zip

  • Agustin,

    I looked over your code and found some things I wanted to discuss with you.

    In "main.c" file, inside the main function you enter LPM3.

    The line of code you use is,

    __low_power_mode_3();

    which is defined in instrinsics.h. This macro is,

    #define __low_power_mode_3()                    \
      (__bis_SR_register(  __SR_GIE                 \
                         | __SR_CPU_OFF             \
                         | __SR_SCG0                \
                         | __SR_SCG1))

    Which brings us to "events.c". In this file you use the function:

    __LPM_off_on_exit();

    You #define this function as,

    #define __LPM_off_on_exit() __bic_SR_register_on_exit(__SR_CPU_OFF | __SR_SCG1 | __SR_OSC_OFF)

    This is not consistent with the function you need to exit LPM3 mode. You are using _SR_OSC_OFF which is not needed and you are not using _SR_SCG0.

    The correct function to exit LPM3 is:

    __bic_SR_register_on_exit(  __SR_CPU_OFF     \
                                 | __SR_SCG0        \
                                 | __SR_SCG1)

    The following macros are already provided and can be used to avoid the issues above.

    /* Low Power Modes coded with Bits 4-7 in SR */
    
    #define LPM0_bits           (CPUOFF)
    #define LPM1_bits           (SCG0+CPUOFF)
    #define LPM2_bits           (SCG1+CPUOFF)
    #define LPM3_bits           (SCG1+SCG0+CPUOFF)
    #define LPM4_bits           (SCG1+SCG0+OSCOFF+CPUOFF)
    
    
    #define LPM0      __bis_SR_register(LPM0_bits)     /* Enter Low Power Mode 0 */
    #define LPM0_EXIT __bic_SR_register_on_exit(LPM0_bits) /* Exit Low Power Mode 0 */
    #define LPM1      __bis_SR_register(LPM1_bits)     /* Enter Low Power Mode 1 */
    #define LPM1_EXIT __bic_SR_register_on_exit(LPM1_bits) /* Exit Low Power Mode 1 */
    #define LPM2      __bis_SR_register(LPM2_bits)     /* Enter Low Power Mode 2 */
    #define LPM2_EXIT __bic_SR_register_on_exit(LPM2_bits) /* Exit Low Power Mode 2 */
    #define LPM3      __bis_SR_register(LPM3_bits)     /* Enter Low Power Mode 3 */
    #define LPM3_EXIT __bic_SR_register_on_exit(LPM3_bits) /* Exit Low Power Mode 3 */
    #define LPM4      __bis_SR_register(LPM4_bits)     /* Enter Low Power Mode 4 */
    #define LPM4_EXIT __bic_SR_register_on_exit(LPM4_bits) /* Exit Low Power Mode 4 */

    So all you would have to do is use LMP3; to enter LPM3 mode and LPM3_EXIT; to exit it.

    Also if you would like to enter low power modes with interrupts enabled, as shown in the User Guide for MSP430x5xx and MSP430x6xx on page 67.

    // Enter LPM0 Example
    __bis_SR_register(LPM0_bits + GIE); // Enter LPM0 with interrupts enabled
    // Exit LPM0 Interrupt Service Routine
    __bic_SR_register_on_exit (LPM0_bits); // Exit LPM0
    // Enter LPM1 Example
    __bis_SR_register(LPM1_bits + GIE); // Enter LPM1 with interrupts enabled
    // Exit LPM1 Interrupt Service Routine
    __bic_SR_register_on_exit (LPM1_bits); // Exit LPM1
    // Enter LPM2 Example
    __bis_SR_register(LPM2_bits + GIE); // Enter LPM2 with interrupts enabled
    // Exit LPM2 Interrupt Service Routine
    __bic_SR_register_on_exit (LPM2_bits); // Exit LPM2
    // Enter LPM3 Example
    __bis_SR_register(LPM3_bits + GIE); // Enter LPM3 with interrupts enabled
    // Exit LPM3 Interrupt Service Routine
    __bic_SR_register_on_exit (LPM3_bits); // Exit LPM3
    // Enter LPM4 Example
    __bis_SR_register(LPM4_bits + GIE); // Enter LPM4 with interrupts enabled
    // Exit LPM4 Interrupt Service Routine
    __bic_SR_register_on_exit (LPM4_bits); // Exit LPM4
    

    Please let us know if this solves the issue.

  • Hi,
    Thanks for the input.
    We don't clear SCG0 because we don't want the FLL, and the OSC_OFF is there to have only one macro but shouldn't make a difference as it was already cleared and we are just clearing again.
    Is it wrong to leave SCG0 set when exiting LPM3? We do this a lot...

    That being said, we tried changing the macros to what you suggest and we still have the same behavior.

    Were you able to reproduce the issue?
  • Well not clearing the SCG0 means that technically speaking you are not exiting LPM3, based on the definitions of LPM modes and Active mode.

    Not clearing this bit means keeping the FLL disabled which as described in the User Guide page 167,

    "When the FLL operation is disabled, the DCO continues to operate at the current settings. Because it is not stabilized by the FLL, temperature and voltage variations influence the frequency of operation. See the device-specific data sheet for voltage and temperature coefficients to ensure reliable operation."

    I am testing the code. You mentioned the issue you are facing doesn't show up in debug mode?

  • It does not happen in Debug mode, I guess because it doesn't really go to LPM3
  • Agustine,

    I have tested your code and modified somethings to figure out what was causing the problem.

    The first thing I did was add,

    P6OUT_bit.P6OUT4 = 1;
    __delay_cycles(2000000);
    P6OUT_bit.P6OUT4 = 0;

    to the main function before the for(;;).

    This helped me use an LED to detect whether the watch dog timer was able to reset the device when we would get stuck or not.

    Every time I would see the code stop working it would take approximately 16 seconds for the watch dog timer to reset the device.

    Next I verified the TimerB interrupt. I commented out the lines of code inside the for(;;) loop related to TimerA to make sure that we could go into low power mode and exit out of it every 30 us. This also worked.

    Finally I tested the two timers together. The original code gave TimerA a period of 60 ticks to 80 ticks. At 4 MHz input clock, this would take 15 to 20 us for TimerA to time out.

    The first thing I tried was trying the code with a constant period of 60 ticks. This worked. So I ran the test multiple times to see what TimerA period would cause the code to stop exiting LPM3 mode. The value I reached was 68 ticks as the period of TimerA.

    I am currently suspecting that it could be the errata PMM15. If the time between timer setup to timer timeout is close to 30 us, it could be what PMM15 has stated. 

  • Hello,
    I'm glad you were able to reproduce the issue.
    Yes, the WDT does work. I mentioned that above in the thread, we probably had an error initially.

    The PMM15 as described should not happen with the used SVSH configuration, so at least this would be a new condition if not a different issue.
  • Agustun,

    I just double checked with the scope and the TimerA timeout on scope shows more than 28 us with i = 70. 29 us is the max that would be allowed based on PMM15. However, you are correct about the SVSH setting. I will look into whether this is a new condition or a different issue. For now there are two options,

    1. Use TimerA with values less than 70 (67 to be exact).

    or

    2. Use TimerB with longer timeout. I used 50 us as an example and the issue is not seen anymore.

    If this solves the issue please click Verify Answer

  • The issue appeared in a new device that uses TimerB and an asynchronous input, so changing or limiting the Time will not work. We really need to know if it's a new errata or new conditions and in either case which conditions, so we can use a workaround or avoid the errata.

  • Hi Agustin,

    Which device revision are you using?

  • Hello Cameron,

    We initially saw this behavior on:
    MSP430F5659 (ZQW package)

    We then reproduced it on:
    MSP430F5659 (PZ package)
    MSP430F6659
    MSP430F5342 
     
    The markings are listed below. I couldn't find how to identify the revision from them.

    46AG35TG4
    MSP430F5659

    MSP430F5342
    TI 571 K
    AXLO G4

    MSP430 TM
    F6659
    2BC41PT A
    TI G1

    MSP430F5659
    62AP5LTB
    TI G1

    Regards,
    Agustin

  • Just found the rev location in the errata.

    MSP430F5659 rev B (ZQW package)
    MSP430F5659 rev not specified, I assume A?(PZ package)
    MSP430F6659 rev A
    MSP430F5342 rev K
  • Hello,

    Were you able to find more information about this??

    Regards,

    Agustin

  • Agustin,

    I was able to recreate this issue on the MSP430F6659 also. You mentioned that the SVS in manual mode eliminated this error? I would like to next test different SVS modes.

    Could you please share what you changed in your code to cause this issue to be eliminated?

  • Hello,

    When we change the SVSH to manual (SVSMHACE = 0) it doesn't seem to happen, either in Full or Normal.
  • Agustin,

    I was doing more testings today and I noticed even with SVSMHACE = 1, the issue would not occur if I did not toggle a pin in the main for(;;) loop. as you mentioned the issue we are seeing is very code dependent. I tried clearing the SVSMHACE bit and issue did not appear. I will be sending the project to the MSP systems applications team for further testing. I will get back to you as soon as I have results from the systems apps team.

    Again thank you in advance for being patient.
  • Yes, when you change timing it might seem fixed. We had a sweep because of that, which I think you changed to a fixed delay.
    Please let me know how this goes.
  • Agustin,

    Just wanted to check in and let you know we are still working on this and I will get back to you as soon as we find an answer.

    Thank you for your patience.

  • Thanks,
    Meanwhile we are disabling the automatic change of the SVSH. That seems to avoid the issue.
    Let me know if you make any progress.
    Regards

  • Hello Nima,
    Any news regarding this issue?
  • Agustin,

    I have contacted our systems apps team and they are currently working on it. This morning I also made some of our SVS experts aware of this issue. They will get back to me and as soon as I find out new information, I will immediately let you know.
  • Hi Agustin,

    actually it look like the table and the ERRATA decription has gap. The original root cause analysis said that you have to use it it manual mode.
    We will discuss this internal and come back to you with a final decision once we have a common agreement.
    So far thanks a lot for reporting this! Thanks a lot.
  • Hi Dietmar,

    Thanks for the update.
    So I understand the ERRATA and associated PMM15Check() are missing some conditions and the way to avoid the problem is to not use Automatic SVSH.

    Regards,
    Agustin
  • Hi Agustin,

    correct, we will work on getting the documentation corrected.

    Best regards,
    Dietmar

  • Thank you all for helping with this!!
    Regards,
    Agustin

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