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MSP430G2755: One Master Multiple Slave SPI with 3 pin mode

mitch3195
Prodigy 50 points

Part Number: MSP430G2755

Hi all, 

I am trying to configure a MSP430G2755 master to communicate with multiple MSP430G2755 slaves. I cannot use 4-pin mode because of the hardware wiring. What I am trying to do is related to this post: https://e2e.ti.com/support/microcontrollers/msp430/f/166/t/302862 

At the bottom of that post, it is mentioned a single master/multiple slave configuration can be achieved with 3 pin mode and I am hoping someone can provide more detail on how this can be accomplished. I have attempted initializing the spi state machine at start up but I seem to be getting some cross talk on the spi bus from slaves a,b,c when I am trying to talk to slave d for example. I also thought to initialize the slave spi state machine when the slave select is pulled low in a ISR, but my slave select pins are on P4 and not interruptible. 

Does anyone have any other ideas?

  • 0
    TI__Guru**** 223987 points
    Hi Mitch,

    Tie the CLK, SIMO, and MOSI pins together but use GPIOs to control the CS/SS pins of each slave device, therefore controlling which device actively responds to the master's commands. These pins are not required to be interrupt-capable since they are controlled by the master. The slave devices should not be sending information to the MSP430 unless specifically commanded/requested.

    Regards,
    Ryan
  • 0 in reply to Ryan Brown1
    Prodigy 50 points
    Hi Ryan,

    Thank you for responding!

    I understand that a slave should not respond unless that slave's SS line is pulled low, but I am having some trouble implementing that.

    I only pull one of the slave SS lines low, but the other slaves still respond even though I have not pulled their lines low. Is the only way to make a slave completely deaf to leave the SPI state machine in reset until its SS line is pulled low?
  • 0 in reply to mitch3195
    TI__Guru**** 223987 points
    This is true for 3-pin mode, hence you will need to place the SS lines on GPIO pins that interrupt when the pin goes low to start the SPI and again from a low-to-high transition in order to hold the state machine it in a reset state.

    Regards,
    Ryan
  • 0 in reply to Ryan Brown1
    Prodigy 50 points
    Thanks Ryan, that leads into the original problem, which I did not describe well.

    The hardware I have been given has the SS lines on P4.0,1,2,3 , which do not interrupt.

    Is there any way to do what you previously described with SS lines that do not interrupt?
  • 0 in reply to mitch3195
    TI__Guru**** 223987 points
    You would have to poll these lines continuously during your main while loop to evaluate a transition and react accordingly.

    Regards,
    Ryan

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