MSP430F5328: Advised oscillator stable delay

Jeroen Begeer

Part Number: MSP430F5328
Other Parts Discussed in Thread: MSP430F5438A

Hello,

I am using a MSP430F5438A and MSP430F5328 in my project.

In the project of the MSP430F5328 I have to run the code as fast as possible after power up. The project is using XT2 as clock source with a 20 MHz cristal.

During the initialization of the project there is waited till the clock is stable. As we want to run the program with a stable clock.

That is done in the same way as in TI example: "MSP430F532x_OF_LFXT1_nmi":

  do
  {
    UCSCTL7 &= ~(XT1LFOFFG + DCOFFG);       // Clear XT1 & DCO fault flags
    SFRIFG1 &= ~OFIFG;                      // Clear OSC Fault flag
    for (i = 0x0FFF; i > 0; i--);           // Time for flag to set????
    P1OUT ^= BIT0;                          // Toggle P1.0 
  }while ( (SFRIFG1 & OFIFG) );

When I look at the example for the MSP430F5438A (msp430x54xA_OF_LFXT1_nmi) I see that the for loop is much larger:

  do
  {
    UCSCTL7 &= ~(XT1LFOFFG + DCOFFG);       // Clear XT1 & DCO fault flags
    SFRIFG1 &= ~OFIFG;                      // Clear OSC Fault flag
    for (i = 0xFFFF; i > 0; i--);           // Time for flag to set
    P1OUT ^= BIT0;                          // Toggle P1.0 using exclusive-OR
  }while ( (SFRIFG1 & OFIFG) );

1. Why are these wait times different?

2. What is the preferred method to wait till the clock is stable?

3. How can I run the program as fast as possible with a stable clock?

4. Can I shorten those wait times (or remove the delay at all) and what are the risks then?

Thank you in advance,

Jeroen

over 9 years ago

0 Jeroen Begeer over 9 years ago

Prodigy 220 points

I see that setting a color in code isn't working. The code should be:

That is done in the same way as in TI example: "MSP430F532x_OF_LFXT1_nmi":

do
{
UCSCTL7 &= ~(XT1LFOFFG + DCOFFG); // Clear XT1 & DCO fault flags
SFRIFG1 &= ~OFIFG; // Clear OSC Fault flag
for (i = 0x0FFF; i > 0; i--); // Time for flag to set????
P1OUT ^= BIT0; // Toggle P1.0
}while ( (SFRIFG1 & OFIFG) );

When I look at the example for the MSP430F5438A (msp430x54xA_OF_LFXT1_nmi) I see that the for loop is much larger:

do
{
UCSCTL7 &= ~(XT1LFOFFG + DCOFFG); // Clear XT1 & DCO fault flags
SFRIFG1 &= ~OFIFG; // Clear OSC Fault flag
for (i = 0xFFFF; i > 0; i--); // Time for flag to set
P1OUT ^= BIT0; // Toggle P1.0 using exclusive-OR
}while ( (SFRIFG1 & OFIFG) );

0 Ilmars over 9 years ago in reply to Jeroen Begeer

Guru 46710 points

Delay in the while() loop is part of the error indicator, have nothing to do with OSC fault clear or it's timing. If OSC fault cannot be cleared, then while() loop will never end and LED connected to P1.0 will be blinking continuously. Why delays differ? - One programmer preferred faster blink rate than another :)

You easily can drop this osc fault error indicator:

do {
UCSCTL7 &= ~(XT1LFOFFG + DCOFFG); // Clear XT1 & DCO fault flags
SFRIFG1 &= ~OFIFG; // Clear OSC Fault flag
} while ( (SFRIFG1 & OFIFG) );

0 Clemens Ladisch over 9 years ago

Guru 321020 points

The hardware requires 1024 valid clock cycles before it clears the fault flag and allows the clock to be used. So removing the for() loop does not make the outer do-while loop finish any faster.

If you want to execute something, you can use the DCO instead, and do the clear/check loop later. But then you don't have an exact 20 MHz clock but whatever your DCO happens to run at. (Does "stable" mean "accurate"?)

0 Jeroen Begeer over 8 years ago in reply to Clemens Ladisch

Prodigy 220 points

Dear Ilmars and Clemens,

Thank you both for your replies.
It is clear now how it is working.

Best regards,
Jeroen

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MSP430F5328: Advised oscillator stable delay