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msp432p401r: USCI42 errata, when will it get fixed

Part Number: msp432p401r


USCI42 from the Rev H errata says that the TXIFG flag is set regardless of the state (full/empty) of TXBUF.  TXIFG gets set on the last stop bit of the transmission.

Potentially this can cause the system to overwrite the TXBUF when it contains valid untransmitted data.  I haven't figured out the failure timing for this to occur.  But this looks like a really nasty bug lurking.

I'm glad you guys found it.  But there isn't a workaround.   Is there a horizon for when this will be fixed?

thanks,

eric

  • Eric,
    I agree that having this feature (UCTXPTIFG) would have allowed us to more safely sequence the loading of the TXBUF.
    However we have no current plans to fix this issue on upcoming revisions.

    If this changes, I'll post back to the forum.

    Regards,
    Priya
  • Priya Thanigai said:
    Eric,
    I agree that having this feature (UCTXPTIFG) would have allowed us to more safely sequence the loading of the TXBUF.
    However we have no current plans to fix this issue on upcoming revisions.

    If this changes, I'll post back to the forum.

    Regards,
    Priya

    I wouldn't call this a feature.  Definitely a bug.  definitely not how it should work.   TXIFG should only get set on the transition when a full TXBUF is copied into the shift register and TXBUF goes empty.

    The problem is there is a lurking race condition and a lurking bug that can cause data in the middle of a transmission to get lost.

    so i wouldn't call it a feature.  Hopefully this will get fixed in the Rev E version of the chip.

  • To clarify, I meant when functional, the ability to use TXCPTIFG correctly to notify the shift register contents have been emptied and a stop bit has been sent is a "feature". The fact that it does not work has been recorded as the errata.

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