Timer_A: TACLR and MCx

Roman T.

Other Parts Discussed in Thread: MSP430F2132

Hi there

I'm using a MSP430F2132. Just now I noticed, that setting the TACLR bit in the TA0CTL register doesn't reset the count direction defined by the MCx bits, which is contrary to the description of the TACLR bit in the user's guide. However, the block diagram of the Timer_A shows no connection between TACLR and the Count Mode block. Thus, I guess the behaviour of the MSP430 ist correct and the description of the TACLR bit is incorrect. Is this right?

Regards

Roman

over 15 years ago

0 old_cow_yellow over 15 years ago

Guru 58965 points

The user's guide says: "Setting TACLR also clears the clock divider and count direction for up/down mode."

It does not clear "count direction defined by the MCx bits".

Thus, if MCx bits is for up/down mode and currently TAR is counting down, after you set TACLR, MCx is unchanged but TAR will count up.

0 Roman T. over 15 years ago in reply to old_cow_yellow

Prodigy 150 points

Oh, well, ok, now I got it. Thanks for your help.

0 Jens-Michael Gross over 15 years ago in reply to Roman T.

Guru 227245 points

I misinterpreted this description too at first, thinking it will reset the configutration.

Yet it only means that the current count direction is reset to up, TAR is set to 0 (not triggering any CCR) and the current content/count of the prescaler/divider is reset to 0, not the configured prescaller width.

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Timer_A: TACLR and MCx