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TimerA Interrupts

Kadir AVCI
Prodigy 30 points
Other Parts Discussed in Thread: MSP430F2274

Hi,

I am new to MSP430f2274. I am using CCS v4.1.2, and my question is about TimerA interrupts. I use the code below but a problem occurs in ISR:

#include "msp430x22x4.h"

volatile unsigned int counter = 0;
void main ( void)
{
  WDTCTL = WDTPW + WDTHOLD;               // Stop Watchdog Timer
  P1DIR |= 0x01;  
  BCSCTL3 |= LFXT1S_2;                                 //ACLK = VLO
  TACCR0 = 5000;
  TACTL = TASSEL_1 + MC_1 + TAIE;           // ACLK, upmode, interrupt

  __bis_SR_register(LPM3_bits + GIE);       // Enter LPM3 w/ interrupt
  while(1);
}


#pragma vector=TIMERA1_VECTOR
__interrupt void TIMERA(void)
{
        P1OUT ^= 0x01;                // overflow
}

However, when I use "switch" it works:

__interrupt void TIMERA(void)
{
    switch (TAIV)
    {
        case 10:    P1OUT ^= 0x01;                // overflow
    }
}

I wonder what is wrong with the upper code. Can anyone guide me to the answer?

Thanks.

Kadir*

*Sorry for bad english, I'm not native speaker, and this is my first message.

  • 0
    Guru 58965 points

    The TIMERA1_VECTOR is shared by the TAIFG and other sources. Thus, when an interrupt is acknowledged,  the hardware does not clear TAIFG automatically. You need to clear it inside your ISR. Otherwise another TAIFG interrupt will be generated once you exit your ISR.

    Reading the TAIV will give you a value indicating which one of the possible interrupt sources is causing the current interrupt. It also has a desired side effect of clearing that interrupt flag. In your case of TAIFG, reading TAIV will show a value of 10, and TAIFG is cleared.

  • 0 in reply to old_cow_yellow
    Intellectual 895 points

    You can also write TAIV to clear the interrupt flag.

  • 0
    Guru 17650 points

    Hi Kadir,

    pls refer to the code below. This shows how you can hable the various interrupt source.

    #pragma vector = TIMERA1_VECTOR
    __interrupt void vTA1_ISR(void)
    {
      switch (__even_in_range(TAIV, 10))  // Efficient switch-implementation
      {
        case  0: break;    // No interrupt   
        case 2: break;    // CCR1 capture interrupt  
        case 4: break;    // CCR2 capture interrupt   
        case 6: break;    // Reserved
        case 8: break;    // Reserved
        case 10: break;    // Timer Overflow                          
      }
    }

    Rgds
    aBUGSworstnigthmare

    P.S. Edited case 0; copy and paste error ;o)

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