when shorting HF external 48Mhz crystal，the HF fail IFG will be set ，so what i have done is to clear HFXTIFG in the CS ISR and wait for HFXT oscillcate again.
but some times(shorting external 48MHz crystal frequencely ) ,it will cause HardFault，and the LED stop blink when using the code just as the attached.
why this happenes ? and what can i do to avoid this phenomenon?
1)the reason why i do this experiment is some times ESD will cause the Crystal stop oscillate, so we need to resume the Crystal manually by software.
2)the borad i used is the MSP432 launchpad (RED color )
3)my code is just as the following:
/* DriverLib Includes */
#include "driverlib.h"
/* Standard Includes */
#include <stdint.h>
#include <stdbool.h>
void CS_IRQHandler(void);
/* Application Defines */
#define TIMER_PERIOD 50000
/* Timer_A UpMode Configuration Parameter */
const Timer_A_UpModeConfig upConfig =
{
TIMER_A_CLOCKSOURCE_SMCLK, // SMCLK Clock Source
TIMER_A_CLOCKSOURCE_DIVIDER_48, //
TIMER_PERIOD, // 50000 tick period
TIMER_A_TAIE_INTERRUPT_DISABLE, // Disable Timer interrupt
TIMER_A_CCIE_CCR0_INTERRUPT_ENABLE , // Enable CCR0 interrupt
TIMER_A_DO_CLEAR // Clear value
};
int main(void)
{
volatile unsigned int i = 0;
/* Halting WDT */
MAP_WDT_A_holdTimer();
/* Configuring pins for peripheral/crystal usage and LED for output */
MAP_GPIO_setAsPeripheralModuleFunctionOutputPin(GPIO_PORT_PJ,
GPIO_PIN0 | GPIO_PIN1, GPIO_PRIMARY_MODULE_FUNCTION);
MAP_GPIO_setAsPeripheralModuleFunctionOutputPin(GPIO_PORT_PJ,
GPIO_PIN2 | GPIO_PIN3, GPIO_PRIMARY_MODULE_FUNCTION);
MAP_CS_disableFaultCounter(CS_HFXT_FAULT_COUNTER);
MAP_CS_disableFaultCounter(CS_LFXT_FAULT_COUNTER);
MAP_GPIO_setAsOutputPin(GPIO_PORT_P1, GPIO_PIN0);
/* Just in case the user wants to use the getACLK, getMCLK, etc. functions,
* let's set the clock frequency in the code.
*/
CS_setExternalClockSourceFrequency(32000,48000000);
/* Starting HFXT in non-bypass mode without a timeout. Before we start
* we have to change VCORE to 1 to support the 48MHz frequency */
MAP_PCM_setCoreVoltageLevel(PCM_VCORE1);
MAP_FlashCtl_setWaitState(FLASH_BANK0, 2);
MAP_FlashCtl_setWaitState(FLASH_BANK1, 2);
CS_startHFXT(false);
MAP_CS_initClockSignal(CS_ACLK, CS_LFXTCLK_SELECT, CS_CLOCK_DIVIDER_1);
MAP_CS_initClockSignal(CS_BCLK, CS_LFXTCLK_SELECT, CS_CLOCK_DIVIDER_1);
MAP_CS_initClockSignal(CS_MCLK, CS_HFXTCLK_SELECT, CS_CLOCK_DIVIDER_1);
MAP_CS_initClockSignal(CS_SMCLK, CS_HFXTCLK_SELECT, CS_CLOCK_DIVIDER_1);
MAP_SysCtl_disableNMISource(SYSCTL_CS_SRC);
MAP_CS_registerInterrupt(&CS_IRQHandler);
/* Configuring Timer_A1 for Up Mode */
MAP_Timer_A_configureUpMode(TIMER_A1_BASE, &upConfig);
/* Enabling interrupts and starting the timer */
MAP_Interrupt_enableInterrupt(INT_TA1_0);
MAP_Timer_A_startCounter(TIMER_A1_BASE, TIMER_A_UP_MODE);
MAP_Interrupt_setPriorityGrouping(0x02);
MAP_Interrupt_setPriority(CS_HFXT_FAULT,0X00);
/* Enabling MASTER interrupts */
MAP_Interrupt_enableMaster();
MAP_Interrupt_disableInterrupt(FAULT_HARD);
MAP_CS_enableInterrupt(CS_HFXT_FAULT | CS_LFXT_FAULT);
while(1)
{
__no_operation();
}
}
void CS_IRQHandler(void)
{
volatile uint32_t i;
CS->KEY = CS_KEY_VAL ; // Unlock CS module for register access
// Loop until XT1, XT2 & DCO fault flag is cleared
do
{
// Clear XT2,XT1,DCO fault flags
CS->CLRIFG |= CS_CLRIFG_CLR_DCOR_OPNIFG | CS_CLRIFG_CLR_HFXTIFG |
CS_CLRIFG_CLR_LFXTIFG | CS_CLRIFG_CLR_FCNTLFIFG;
SYSCTL->NMI_CTLSTAT &= ~ SYSCTL_NMI_CTLSTAT_CS_SRC;
// Wait 40,000 CPU Cycles
for(i=0; i<40000; i++);
} while ((SYSCTL->NMI_CTLSTAT | SYSCTL_NMI_CTLSTAT_CS_FLG)
&& ((CS->IFG & CS_IFG_LFXTIFG) || (CS->IFG & CS_IFG_HFXTIFG))); // Test oscillator fault flag
CS->KEY = 0; // Lock CS module from unintended accesses
}
void TA1_0_IRQHandler(void)
{
static unsigned char count;
count++;
if(count >= 10)
{
count = 0;
MAP_GPIO_toggleOutputOnPin(GPIO_PORT_P1, GPIO_PIN0);
}
MAP_Timer_A_clearCaptureCompareInterrupt(TIMER_A1_BASE,
TIMER_A_CAPTURECOMPARE_REGISTER_0);
}
