CCS/MSP432P401R: Doubts about Timer A examples

Part Number: MSP432P401R

Tool/software: Code Composer Studio

Hello!

I am having a few problems in understanding Timer_A functionalities. I've already read the technical reference manual, but I can't understand the examples from resource explorer/driverlib.

For me, the example is a bit confusing. In the comment section, it says that the TACLK will use the 1.045MHz SMCLK. Then, it says TACLK = SMCLK = 3MHz.

As far as I understand, the clock being trully in the firmware is TACLK = 3MHz, since the divider is 1, right? And if this is the correct case, I don't understand how TIMER_PERIOD = 127 generates ~233 us, as stated in the comments.

My calculations (might be wrong): 3MHz / 127 = 23622 Hz = 42.3 us.

Am I missing something?

Thanks a lot for your help!

The partial code taken from resource explorer > timer_a_updown_compare_multiple_pwm, with the initial comments is the following:

/*******************************************************************************

 * MSP432 PWM TA1.1-2, Up/Down Mode, DCO SMCLK
 *
 * Description: This program generates two PWM outputs on P2.2,3 using
 * Timer1_A configured for up/down mode. The value in CCR0, 128, defines the
 * PWM period/2 and the values in CCR1 and CCR2 the PWM duty cycles. Using
 * ~1.045MHz SMCLK as TACLK, the timer period is ~233us with a 75% duty cycle
 * on P7.7 and 25% on P7.6.
 * SMCLK = MCLK = TACLK = default DCO 3MHz
 * Author: Timothy Logan
*******************************************************************************/
/* DriverLib Includes */
#include <ti/devices/msp432p4xx/driverlib/driverlib.h>

/* Application Defines */
#define TIMER_PERIOD 127
#define DUTY_CYCLE1 32
#define DUTY_CYCLE2 96

/* Timer_A UpDown Configuration Parameter */
const Timer_A_UpDownModeConfig upDownConfig =
{
        TIMER_A_CLOCKSOURCE_SMCLK,              // SMCLK Clock SOurce
        TIMER_A_CLOCKSOURCE_DIVIDER_1,          // SMCLK/1 = 3MHz
        TIMER_PERIOD,                           // 127 tick period
        TIMER_A_TAIE_INTERRUPT_DISABLE,         // Disable Timer interrupt
        TIMER_A_CCIE_CCR0_INTERRUPT_DISABLE,    // Disable CCR0 interrupt
        TIMER_A_DO_CLEAR                        // Clear value

};