CCS/MSP430FR5969: FRAM power supply disabling issue.

While the device is in AM (Active mode), the FRAM memory power is controlled by the FRPWR bit and FRAM access. When the FRPWR is set, the FRAM memory is in ACTIVE mode. When the FRPWR is cleared by CPU, the FRAM memory goes into INACTIVE mode so that the FRAM memory does not consumes power.

The INACTIVE mode can be used if no FRAM access is required for a significant amount of time. Once the FRAM memory is in the INACTIVE mode, wake-up is automatic. An access to FRAM (read or write) will wake up the FRAM memory before performing the access. In this case, the FRPWR bit is set automatically by the FRAM controller.

When the device enters LPM0/1/2/3/4 modes, the FRAM memory also enters INACTIVE mode regardless of the FRPWR bit status. When the device wakes up from LPM0/1/2/3/4, the FRAM memory will be immediately powered up (ACTIVE mode) if the FRPWR is set, but if the FRPWR bit is cleared, the FRAM memory will remain in INACTIVE mode until the FRAM memory is actually accessed (read or write). The latter case can be used to save the device power consumption in case the device wakes up only for a short amount of time, and the task during the wake-up can be executed from RAM, so no need of FRAM access.