CCS/MSP430F5244: SPI issue

Tool/software: Code Composer Studio

Hi, I'm working on msp430F5244. My problem is when I run the controller at 1Mhz speed SPI works marginally and if I run the controller at 8Mhz SPI not at all working ,I pasted my code, Please help me someone where I'm wrong.

#include <msp430.h>
#include <stdint.h>
//#include "System_clk.h"
//#include "spi_function.h"
void systemClockConfigure_8Mhz()
{
    PMAPPWD = 0x02D52;                        // Enable Write-access to modify port mapping registers
    P4MAP7 = PM_MCLK;
    PMAPPWD = 0;                              // Disable Write-Access to modify port mapping registers

    UCSCTL3 = SELREF_2;                       // Set DCO FLL reference = REFO
    UCSCTL4 |= SELA_2 /*| SELS__DCOCLK*/;         // Set ACLK = REFO

    __bis_SR_register(SCG0);                  // Disable the FLL control loop
    UCSCTL0 = 0x0000;                         // Set lowest possible DCOx, MODx
    UCSCTL1 = DCORSEL_5;                      // Select DCO range 16MHz operation
    UCSCTL2 = FLLD_1 + 249;                   // Set DCO Multiplier for 8MHz
                                              // (N + 1) * FLLRef = Fdco
                                              // (249 + 1) * 32768 = 8MHz
    __bic_SR_register(SCG0);                  // Enable the FLL control loop

    // Worst-case settling time for the DCO when the DCO range bits have been
    // changed is n x 32 x 32 x f_MCLK / f_FLL_reference. See UCS chapter in 5xx
    // UG for optimization.
    // 32 x 32 x 8 MHz / 32,768 Hz = 250000 = MCLK cycles for DCO to settle
    __delay_cycles(250000);


    // Loop until XT1,XT2 & DCO stabilizes - In this case only DCO has to stabilize
    do
    {
      UCSCTL7 &= ~(XT2OFFG + XT1LFOFFG + DCOFFG);
                                              // Clear XT2,XT1,DCO fault flags
      SFRIFG1 &= ~OFIFG;                      // Clear fault flags
    }while (SFRIFG1&OFIFG);                   // Test oscillator fault flag

    UCSCTL4 |= SELS__DCOCLK | SELM__DCOCLK;         //MCLK and SMCLK=DCOCLK
}
void systemClockConfigure_1Mhz()
{
    PMAPPWD = 0x02D52;                        // Enable Write-access to modify port mapping registers
    P4MAP7 = PM_MCLK;
    PMAPPWD = 0;                              // Disable Write-Access to modify port mapping registers

    UCSCTL4 |= SELA_2;                        // Set ACLK = REFO
}

void SPI_UCB1Init()
{
    P4DIR |= BIT1 | BIT3 ;
    P4SEL |= BIT1 | BIT3 ;     // MISO and clk pin for spi
    UCB1CTL1 |= UCSWRST;
    UCB1CTL0 |= (UCMSB | UCSYNC | UCMST | UCCKPL); //3wire_spi + sync_mode + MSB first + master_mode    UCCKPH | | UCCKPL
    UCB1CTL1 |= UCSSEL__SMCLK;                    //SMCLK    UCSSEL__SMCLK 12MHz
    UCB1BR0 = 0x00;
    UCB1BR1 = 0x00;
    UCB1CTL1 &= ~UCSWRST;
}

void SPI_LCDTx(uint8_t value)
{
    UCB1TXBUF=value;
    while(!(UCB1IFG & UCTXIFG))
        ;
}
/*
 * main.c
 */
int main(void) {
    WDTCTL = WDTPW | WDTHOLD;	// Stop watchdog timer
//    systemClockConfigure_1Mhz();
    systemClockConfigure_8Mhz();
    SPI_UCB1Init();
    while(1)
    {
        SPI_LCDTx('a');
        SPI_LCDTx('b');
        SPI_LCDTx('c');
    }
	return 0;
}