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MSP430F5529: How to configure USCSTL0 register?

Part Number: MSP430F5529


First off: I'm brand new to microcontroller development, so please forgive me for the simple question. I'm trying to learn for my FIRST robotics team so we can use the MSP430 to handle some extra sensors. 

I'm working on understanding/configuring the Unified Clock System. I want it to run on the 39 MHz setting. I've been reading the family guide and device specific datasheet. I think I have a basic understanding. My code is below:

/*
* Objective: have SMCLK run at 39 MHz for driving an SPI
*/
WDTCTL = WDTPW | WDTHOLD; // Stop watchdog timer
__bis_SR_register(SCG0); //Disable FLL
UCSCTL0 = DCO0+DCO1+DCO2+DCO3+DCO4 ; //DCO 31 bit and MOD bit 0 [THIS IS NOT WORKING]
UCSCTL1 = DCORSEL_6; //Select frequency range on www.ti.com/.../msp430f5529.pdf page 31
UCSCTL2 = 0x000; //Select no loop divider
UCSCTL3 |= SELREF_2; //Set FLL reference to REFOCLK (only internal)
UCSCTL4 |= SELS__DCOCLK; //Select SMCLK clock source to be DCOCLK
P1DIR |= (BIT0 + BIT2); //irrelevant
P2DIR |= BIT2; //Set P2.2 as out direction to monitor clock
P2SEL |= BIT2; //Select P2.2 as SMCLK output defined in www.ti.com/.../msp430f5529.pdf pg 84
__bic_SR_register(SCG0); //Enable FLL

However, this dosen't work as my oscilloscope gets no reading from P2.2. When I change UCSCTL0 to 0x000 its works but is only going at ~7.x MHz. When looking at the register value through the debugger, all the USCSTLx registers are correct EXCEPT for USCSTL0. Which I believe may not be working how I think. Could someone please explain how UCSTL0 is configured and what I need to do in order to have it run at 39 MHz?

  • Hi Ashwin, 

    From the MSP430F5529 Datasheet, in section 5.3 you can see that the maximum system frequency is 25MHz. 39MHz is beyond device specifications and I can't advise you on how to set that frequency up. 

    If you'd like to setup the device to 25MHz, you can find a plethora of examples for this device here.  The MSP430F55xx_UCS_10.c example is what you should be referencing. If you have any questions feel free to ask. 

    Best regards, 
    Caleb Overbay

  • Ashwin Gupta said:
    I want it to run on the 39 MHz setting...

    If you need because of some special reason to run F5529 overclocked, than my advice is to use MCLK directly from XT2, on highest Vcore level. Depending on used peripherals, it should work just fine with 32 MHz XT2.

  • Thanks for the quick response! I realized this last night, but I didn't know how to stop the question from being posted. Sorry, I should've noticed the 25 MHz limit earlier. Luckily, 25 MHz is more then sufficient for what I'm trying to do ( I only need 20). The UCS_10 example is just what I was looking for. I appreciate that very much. One thing I still don't understand however, is why the DCOx and MODx bits are always set to 0x000 in every example I see. On the UCS_10 example, they use DCORSEL_7 for UCSCTL1 with the comment that they've put it in the 50 MHz range. Yet they use 0x000 for DCO and MOD for UCSTL0. According to the datasheet (www.ti.com/.../msp430f5529.pdf) page 31, this makes very little sense to me as a DCORSEL7 and DCO0 should put it in 8.5-19.6 MHz . If the DCOx was 31, this would be more plausible as it would be between 60-135 MHz according to the datasheet. I understand that the MSP430 can't actually hit those ranges, but all the same the DCOx/MODx bits of UCSCTL0 don't make much sense to me still.

  • The 25 MHz will do. I just picked the 39 arbitrarily because I thought it would be easiest to configure (being the lower bound of its range). Anything over 20 MHz will be sufficient for me. Thank you for the advice though, I may need it in the future.

  • Hi Ashwin,

    The UCSCTL0 register is set to 0x0000 because these bits are automatically modified by the FLL during operation. You can read more on this in the Unified Clock Systme (UCS) section of the device's User's Guide. They don't stay at 0x0000 when the device starts to run.

    Also, the comment regarding the DCORSEL setting is a bit misleading. Looking at Figure 5-10 of the devices datasheet, you can see that DCORSEL_7 has a range from ~11MHz -100MHz and 25MHz is close to the middle. When setting the range select bits, you want the frequency you're trying to setup to be close to the middle of that range. I hope this clears things up a bit.

    Best regards,
    Caleb Overbay
  • Thanks Caleb! That makes much more sense to me now. I was very confused on UCSCTL0 before. This and your previous answer cover my question, I accepted the previous one.

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